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ASM811TEUS-T Datasheet(PDF) 3 Page - Alliance Semiconductor Corporation |
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ASM811TEUS-T Datasheet(HTML) 3 Page - Alliance Semiconductor Corporation |
3 / 10 page 3 of 10 Notice: The information in this document is subject to change without notice ASM811, ASM812 4 Pin µP Voltage Supervisor with Manual Reset October 2003 rev 1.0 Reset Output Operation In µP / µC systems it is important to have the processor and the system begin operation from a known state. A reset output to a processor is provided to prevent improper operation during power supply sequencing or low voltage brown-out conditions. The ASM811/812 are designed to monitor the system power supply voltages and issue a reset signal when the levels are out of range. RESET outputs are guaranteed to be active for VCC above 1.1V. When VCC exceeds the reset threshold, an internal timer keeps RESET active for the reset timeout period, after which RESET becomes inactive (HIGH for the ASM811 and LOW for the ASM812). If VCC drops below the reset threshold, RESET automatically becomes active. Alternatively, external circuitry or an operator can initiate this condition using the Manual Reset (MR) pin. MR can be left open if it is not used. MR can be driven by TTL/CMOS logic or even an external switch. Valid Reset with VCC under 1.1V To ensure logic inputs connected to the ASM811 RESET pin are in a known state when VCC is under 1.1V, a 100kΩ pull- down resistor at RESET is needed. The value is not critical. A 100k Ω pull-up resistor to VCC is needed with the ASM812. Application Information Negative VCC Transients Typically short duration transients of 100mV amplitude and 20µs duration do not cause a false RESET. A 0.1µF capacitor at VCC increses transient immunity. Bidirectional Reset Pin Interfacing The ASM811/812 can interface with µP / µC bi-directional reset pins by connecting a 4.7k Ω resistor in series with the ASM811/812 reset output and the µP/µC bi-directional reset input pin. Power supply BUF Buffered RESET VCC ASM811 GND GND RESET RESET Input µC or µP 4.7kΩ Bi-directional I/O Pin Figure 4: Bi-directional Reset Pin Interface MR VCC Power Supply ASM811 RESET GND 100kΩ VCC Power Supply ASM812 RESET GND MR MR 100kΩ 0V 5V VCC VTH TRST TMRST 5V 0V 5V 0V 5V 0V MR RESET RESET ASM811 ASM812 Figure 1: Reset Timing and Manual Reset (MR) Figures 2 & 3: RESET valid with VCC under 1.1V |
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