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CS6422-ISZ Datasheet(PDF) 39 Page - Cirrus Logic |
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CS6422-ISZ Datasheet(HTML) 39 Page - Cirrus Logic |
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39 / 48 page  CS6422 39 The three pins that comprise the Microcontroller Interface are STROBE, DATA, and DRDY. Also, four extra clocks are required after DRDY is brought high in order to latch the data into the CS6422, as is shown in Figure 7. 4.2.2 Grounding Considerations Proper grounding of the CS6422 is necessary for optimal performance from this mixed-signal de- vice. The CS6422 should be considered an analog device for grounding purposes. The digital sections of the CS6422 are synchro- nized with its ADCs and DACs to minimize the ef- fects of digital noise coupling. However, for external digital devices that are asynchronous with respect to the CS6422, precautions should be taken to minimize the chances of digital noise coupling into the CS6422. A design with the CS6422 should have a separate ground plane for any digital devices. For example, a system microcontroller should be on a digital ground plane with its control lines leading to the CS6422 in the shortest reasonable distance. The CS6422 itself should lie completely on the analog ground plane. 4.2.3 Layout Considerations The physical layout of the traces and components around the CS6422 will also strongly affect the per- formance of the device. Special attention must be paid to decoupling capacitors, the crystal oscillator, and the input anti-aliasing filters. The decoupling capacitors for the power supplies of the CS6422 should be placed as close as possible to the power pins for best performance. There are two capacitors per pin: the 0.1 µF capacitor needs to be closest to the pin to decouple the high fre- quency components, and the larger cap can be far- ther away. The MB pin is the most critical as it connects directly to the on-chip voltage reference. AVDD and DVDD are secondary to MB with re- spect to priority. The crystal oscillator should be placed as close as possible to reduce the distance that the high fre- quency signals must travel. If the crystal is placed too far away, the trace inductance may cause prob- lems with oscillator startup. The next concern with placement is the input anti- aliasing filters for the ADC inputs. NI has an RC low-pass network with a corner frequency of 8 kHz. The capacitor of this low-pass network should be placed very close to the pin so that there is very little exposed trace to pick up noise. If the on-chip microphone amplifier is used, the 0.022 µF capacitor on APO will provide the appropriate cut- off frequency, and so should be placed close to the APO pin. If the on-board preamplifier is not used, APO will have the same RC network as NI, and should be treated similarly. The connections from the controller to the Micro- controller Interface should be short straight traces, if possible. The traces should not run very close to any digital clocks to avoid cross coupling. 4.3 System Design The CS6422 is ultimately only one part of a bigger full-duplex hands-free system. In order for that sys- tem to work well, it needs to be properly balanced. The distribution of the system gains will make or break the echo canceller. In order to judge perfor- mance, however, the system integrator must be armed with the means to test the product. 4.3.1 Gain Structure The distribution of the system gains is an important design consideration to keep in mind. Gain distri- bution is an intricate balancing act where the sys- tem integrator tries to maximize dynamic range while minimizing noise, and at the same time, get- ting excellent echo canceller performance. The basic constraint on getting good echo canceller performance is that the maximum output should not clip when coupled to the input. For example, if in a speakerphone, AO provides 1.1 Vrms to a CS6422 DS295F1 39 |
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