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PRELIMINARY
CY62167DV18
MoBL2™
Document #: 38-05326 Rev. *A
Page 8 of 11
Write Cycle No. 3 (WE Controlled, OE LOW)[17, 18]
Write Cycle No. 4 (BHE</>/BLE</> Controlled, OE</> LOW)</>[17]
Notes:
16. Data I/O is high-impedance if OE = VIH.
17. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
18. During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Switching Waveforms (continued)
DATA
IN VALID
tHD
tSD
tLZWE
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZWE
CE1
ADDRESS
CE2
WE
DATA I/O
DON’T CARE
DATA I/O
ADDRESS
t
t
t
t
t
t
CE 1
WE
DATA
IN VALID
t
BHE /BLE
t
CE 2
t
DON’T CARE
WC
SCE
AW
HA
PWE
SA
HD
SD
BW
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