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IDT70V7339S133BF Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT70V7339S133BF Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 22 page 6.42 4 IDT70V7339S High-Speed 512K x 18 Synchronous Bank-Switchable Dual-Port Static RAM Industrial and Commercial Temperature Ranges Pin Configuration(1,2,3,4,7) (con't.) NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V). 3. All VSS pins must be connected to ground supply. 4. Package body is approximately 20mm x 20mm x 1.4mm. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part-marking. 7. Due to the limited pin count, JTAG is not supported in the DD-144 package. VSS VDDQR VSS I/O9L I/O9R I/O10L I/O10R I/O11L I/O11R VDDQL VSS I/O12L I/O12R VDDQR VSS VDD VDD VSS VSS VDDQL VSS I/O13R I/O13L I/O14R I/O14L VDDQR VSS I/O15R I/O15L I/O16R I/O16L I/O17R I/O17L VSS VDDQL NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 OPTL VDDQR VSS I/O8L I/O8R I/O7L I/O7R I/O6L I/O6R VSS VDDQL I/O5L I/O5R VSS VDDQR VDD VDD VSS VSS VSS VDDQL I/O4R I/O4L I/O3R I/O3L VSS VDDQR I/O2R I/O2L I/O1R I/O1L I/O0R I/O0L VSS VDDQL OPTR 70V7339DD DD-144(5) 144-Pin TQFP Top View(6) 5628 drw 02a 11/20/01 |
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