K9T1G08U0M datasheet(11/38 Pages) SAMSUNG

Part #	K9T1G08U0M

Description	128M x 8 Bits NAND Flash Memory

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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11 / 38 page

FLASH MEMORY

11

K9T1G08U0M

Preliminary

AC Characteristics for Operation

NOTE :

1. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.

2. To break the sequential read cycle, CE must be held high for longer time than tCEH.

3. The time to Ready depends on the value of the pull-up resistor tied R/B pin.

Parameter

Symbol

Min

Max

Unit

Data Transfer from Cell to Register

tR

-15

µs

ALE to RE Delay

tAR

10

-

ns

CLE to RE Delay

tCLR

10

-

ns

Ready to RE Low

tRR

20

-

ns

RE Pulse Width

tRP

25

-

ns

WE High to Busy

tWB

-

100

ns

Read Cycle Time

tRC

50

-

ns

CE Access Time

tCEA

-45

ns

RE Access Time

tREA

-30

ns

RE High to Output Hi-Z

tRHZ

-30

ns

CE High to Output Hi-Z

tCHZ

-20

ns

RE or CE High to Output hold

tOH

15

-

ns

RE High Hold Time

tREH

15

-

ns

Output Hi-Z to RE Low

tIR

0-

ns

WE High to RE Low

tWHR

60

-

ns

Device Resetting Time(Read/Program/Erase)

tRST

-

5/10/500(1)

µs

Last RE High to Busy(at sequential read)

tRB

-

100

ns

CE High to Ready(in case of interception by CE at read)

tCRY

-

50 + tr(R/B)(3)

ns

CE High Hold Time(at the last serial read)(2)

tCEH

100

-

ns

AC Timing Characteristics for Command / Address / Data Input

NOTE :

1. If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.

Parameter

Symbol

Min

Max

Unit

CLE Set-up Time

tCLS

0-

ns

CLE Hold Time

tCLH

5-

ns

CE Setup Time

tCS

0.-

ns

CE Hold Time

tCH

5-

ns

WE Pulse Width

tWP

25 (1)

-ns

ALE Setup Time

tALS

0-

ns

ALE Hold Time

tALH

5-

ns

Data Setup Time

tDS

20

-

ns

Data Hold Time

tDH

5-

ns

Write Cycle Time

tWC

45

-

ns

WE High Hold Time

tWH

15

-

ns

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