SMSC LAN9115

PRODUCT PREVIEW

Revision 0.1 (12-20-04)

Data Brief

PRODUCT FEATURES

LAN9115

Highly Efficient

Single-Chip 10/100

Non-PCI Ethernet

Controller

Highlights

performance applications

interface

multiple standard-definition (SD) MPEG2 streams

(all members are pin-compatible)

Target Applications

Key Benefits

applications

— 16-bit interface

— Burst-mode read support

— Internal SRAM can store over 200 packets

— Supports automatic or host-triggered PAUSE and back-

pressure flow control

— Supports Slave-DMA

— Interrupt Pin with Programmable Hold-off timer

— SRAM-like interface easily interfaces to most

Embedded CPU’s or SoC’s

— Low-cost, low-pin count non-PCI interface for

embedded designs

— Numerous power management modes

— Wake on LAN

— Magic packet wakeup

— Wakeup indicator event signal

— Link Status Change

— Fully compliant with IEEE 802.3/802.3u standards

— Integrated Ethernet MAC and PHY

— 10BASE-T and 100BASE-TX support

— Full- and Half-duplex support

— Full-duplex flow control

— Backpressure for half-duplex flow control

— Preamble generation and removal

— Automatic 32-bit CRC generation and checking

— Automatic payload padding and pad removal

— Loop-back modes

— One 48-bit perfect address

— 64 hash-filtered multicast addresses

— Pass all multicast

— Promiscuous mode

— Inverse filtering

— Pass all incoming with status report

— Disable reception of broadcast packets

— Auto-negotiation

— Automatic polarity detection and correction

— Simple, SRAM-like interface

— 16-bit data bus

— Large, 16Kbyte FIFO memory that can be allocated to

RX or TX functions

— One configurable Host interrupt

— Low profile 100-pin TQFP package; green, lead-free

package also available

— Integral 1.8V regulator

— General Purpose Timer

— Support for optional EEPROM

— Support for 3 status LEDs multiplexed with

Programmable GPIO signals