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LMH6704MFX Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LMH6704MFX
Description  650 MHz Progammable Gain Buffer with Disable
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMH6704MFX Datasheet(HTML) 2 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 4)
Human Body Model
2000V
Machine Model
200V
Supply Voltage
13.5V
I
OUT
(Note 3)
Common-Mode Input Voltage
V
S
to V
S
+
Maximum Junction Temperature
150˚C
Storage Temperature Range
−65˚C to 150˚C
Soldering Information
Infrared or Convection (20 sec.)
235˚C
Wave Soldering (10 sec.)
260˚C
Lead Temp. (soldering 10 sec.)
300˚C
Operating Ratings (Note 1)
Nominal Supply Voltage
±4V to ±6V
Temperature Range (Note 8)
−40˚C to 85˚C
Thermal Resistance
Package
(
θ
JC)(
θ
JA)
8-Pin SOIC
75˚C/W
160˚C/W
6-Pin SOT23
120˚C/W
187˚C/W
Electrical Characteristics (Note 2)
T
A = +25˚C , AV = +2, VS = ±5V, RL = 100
Ω; unless specified.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 6)
Max
(Note 6)
Units
Dynamic Performance
SSBW
-3 dB Bandwidth
V
OUT = 0.5 VPP,AV = +1
650
MHz
SSBW
V
OUT = 0.5 VPP
450
LSBW
V
OUT =2VPP
400
GF
0.1dB
0.1 dB Gain Bandwidth
V
OUT =2VPP
200
MHz
SR
Slew Rate
V
OUT =4VPP, 40% to 60% (Note 5)
3000
V/µs
TRS/TRL
Rise and Fall Time
(10% to 90%)
2V Step
0.9
ns
t
s
Settling Time to 0.1%
2V Step
10
ns
Distortion and Noise Response
HD2L
2
nd Harmonic Distortion
V
OUT = 2.0 VPP,f=10MHz
−62
dBc
HD2H
V
OUT = 2.0 VPP,f=40MHz
−52
HD3L
3
rd Harmonic Distortion
V
OUT = 2.0 VPP,f=10MHz
−78
dBc
HD3H
V
OUT = 2.0 VPP,f=40MHz
−65
IMD
Two-Tone Intermodulation
f = 10 MHz, P
OUT = 10 dBm/tone
−65
dBc
V
N
Output Noise Voltage
f = 100 kHz
A
V = +2
10.5
nV/
A
V = +1
9.3
A
V = −1
10.5
I
NN
Non-Inverting Input Noise
Current
3
pA/
DG
Differential Gain
R
L = 150
Ω, f = 4.43 MHz
.02
%
DP
Differential Phase
R
L = 150
Ω, f = 4.43 MHz
0.02
deg
Static, DC Performance
A
V
Gain
1.98
1.96
2.00
2.02
2.04
V/V
Gain Error
−1
−2
+1
+2
%
V
IO
Input Offset Voltage
2
±7
±8.3
mV
DV
IO
Input Offset Voltage Average
Drift
35
µV/˚C
I
BN
Input Bias Current
Non-Inverting (Note 7)
−5
±15
±18
µA
I
BI
Input Bias Current
Inverting
5
±22
±31
www.national.com
2


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