7

Interconnection with 3V and 5V Logic

The ICL3310 directly interface with most 5V logic families,

including ACT and HCT CMOS. See Table 3 for more

information on possible combinations of interconnections.

FIGURE 7. LOOPBACK TEST AT 120kbps

FIGURE 8. LOOPBACK TEST AT 250kbps

5

µs/DIV.

5V/DIV.

C1 - C4 = 0.1

µF

2

µs/DIV.

5V/DIV.

C1 - C4 = 0.1

µF

TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS

SUPPLY VOLTAGES

SYSTEM

POWER-SUPPLY

VOLTAGE

(V)

SUPPLY

VOLTAGE

(V)

COMPATIBILITY

3.3

3.3

Compatible with all CMOS families.

5

5

Compatible with all TTL and CMOS

logic families.

5

3.3

Compatible with ACT and HCT

CMOS, and with TTL. Incompatible

with AC, HC, or CD4000 CMOS.

FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD

CAPACITANCE

FIGURE 10. SLEW RATE vs LOAD CAPACITANCE

-6.0

-4.0

-2.0

0

2.0

4.0

6.0

1000

2000

3000

4000

5000

0

LOAD CAPACITANCE (pF)

1 TRANSMITTER AT 250kbps

1 TRANSMITTER AT 30kbps

LOAD CAPACITANCE (pF)

0

1000

2000

3000

4000

5000

5

10

15

20

25

+SLEW

-SLEW

ICL3310