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IDT71V67803S133PFGI Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT71V67803S133PFGI Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 23 page 6.42 5 IDT71V67603, IDT71V67803, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with 3.3V I/O, Pipelined Outputs, Single Cycle Deselect Commercial and Industrial Temperature Ranges Pin Configuration 256K x 36, 100-Pin TQFP NOTES: 1. Pin 14 can either be directly connected to VDD, or connected to an input voltage ≥ VIH, or left unconnected. 2. Pin 64 can be left unconnected and the device will always remain in active mode. 100 999897 9695 94939291 90 87868584838281 89 88 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 I/O31 I/O30 VDDQ VSS I/O29 I/O28 I/O27 I/O26 VSS VDDQ I/O25 I/O24 VSS VDD I/O23 I/O22 VDDQ VSS I/O21 I/O20 I/O19 I/O18 VSS VDDQ I/O17 I/O16 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 I/O14 VDDQ VSS I/O13 I/O12 I/O11 I/O10 VSS VDDQ I/O9 I/O8 VSS VDD I/O7 I/O6 VDDQ VSS I/O5 I/O4 I/O3 I/O2 VSS VDDQ I/O1 I/O0 5301 drw 02 VDD /NC(1) I/O15 I/OP3 NC I/OP4 I/OP1 NC I/OP2 ZZ(2) , Top View |
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