Care should be taken when the IC and the load are both

powered from the same supply, and the supply is minimally

regulated. The device derives its internal references from the

power supply, and sensitivity shifts can occur with changes in

Vdd, as happens when loads are switched on. This can induce

detection ‘cycling’, whereby an object is detected, the load is

turned on, the supply sags, the detection is no longer sensed,

the load is turned off, the supply rises and the object is

reacquired, ad infinitum. To prevent this occurrence, the output

should only be lightly loaded if the device is operated from an

unregulated supply, e.g. batteries. Detection ‘stiction’, the

opposite effect, can occur if a load is shed when Out is active.

QT110: The output of the QT110 can directly drive a resistively

limited LED. The LED should be connected with its cathode to

the output and its anode towards Vcc, so that it lights when the

sensor is active-low. If desired the LED can be connected from

Out to ground, and driven on when the sensor is inactive, but

only with less drive current (1mA).

QT110H: This part is active-high, so it works in reverse to that

described above.

3 - CIRCUIT GUIDELINES

3.1 SAMPLE CAPACITOR

When used for most applications, the charge sampler Cs can

be virtually any plastic film or good quality ceramic capacitor.

The type should be relatively stable in the anticipated

temperature range. If fast temperature swings are expected,

especially at higher sensitivity, a more stable capacitor might

be required for example PPS film.

In most moderate applications a low-cost X7R type will work

fine.

3.2 ELECTRODE WIRING

See also Section 3.4.

The wiring of the electrode and its connecting trace is important

to achieving high signal levels and low noise. Certain design

rules should be adhered to for best results:

1. Use a ground plane under the IC itself and Cs and Rs but

NOT under Re, or under or closely around the electrode or

its connecting trace. Keep ground away from these things

to reduce stray loading (which will dramatically reduce

sensitivity).

2. Keep Cs, Rs, and Re very close to the IC.

3. Make Re as large as possible. As a test, check to be sure

that an increase of Re by 50% does not appreciably

decrease sensitivity; if it does, reduce Re until the 50%

test increase has a negligible effect on sensitivity.

4. Do not route the sense wire near other ‘live’ traces

containing repetitive switching signals; the sense trace will

pick up noise from them.

3.3 POWER SUPPLY, PCB LAYOUT

See also Section 3.4.

The power supply can range from 2.5 to 5.0 volts. At 2.5 volts

current drain averages less than 10µA with Cs = 10nF,

provided a 470K Rs resistor is used (Figure 2-6). Idd curves

are shown in Figure 4-4.

Higher values of Cs will raise current drain. Higher Cx values

can actually decrease power drain. Operation can be from

batteries, but be cautious about loads causing supply droop

(see Output Drive, Section 2.2.6) if the batteries are

unregulated.

As battery voltage sags with use or fluctuates slowly with

temperature, the IC will track and compensate for these

changes automatically with only minor changes in sensitivity.

If the power supply is shared with another electronic system,

care should be taken to assure that the supply is free of digital

spikes, sags, and surges which can adversely affect the

device. The IC will track slow changes in Vdd, but it can be

affected by rapid voltage steps.

if desired, the supply can be regulated using a conventional

low current regulator, for example CMOS LDO regulators that

have nanoamp quiescent currents. Care should be taken that

the regulator does not have a minimum load specification,

which almost certainly will be violated by the QT110's low

current requirement. Furthermore, some LDO regulators are

unable to provide adequate transient regulation between the

6

QT110/110H R1.03/0604

Figure 2-5

Using a micro to obtain HB pulses in either output state

(QT110 or QT110H)

Figure 2-4

Getting HB pulses with a pull-down resistor (QT110 shown;

use pull-up resistor with QT110H)

3

46

5

1

+2.5 to 5

7

2

OUT

OPT 1

OPT 2

GAIN

SNS1

SNS2

Vss

Vdd

8

Ro

H eartBeat™ P ulses

M icroprocessor

P O RT_M.x

P O RT_M.y

3

46

5

7

2

OU T

OPT1

OPT2

GA IN

SN S 1

SN S 2

Figure 2-6 Eliminating HB Pulses

3

46

5

7

2

OUT

OPT1

OPT2

GAIN

SNS1

SNS2

CMO S

100pF

GATE OR

MICRO INPUT