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IDT70V9089L9PFI Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT70V9089L9PFI Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 19 page ©2004 Integrated Device Technology, Inc. MAY 2004 DSC 3750/8 1 Functional Block Diagram Features: ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location ◆ High-speed clock to data access – Commercial:6.5/7.5/9/12/15ns(max.) – Industrial: 9ns (max.) ◆ Low-power operation – IDT70V9089/79S Active: 429mW (typ.) Standby: 3.3mW (typ.) – IDT70V9089/79L Active: 429mW (typ.) Standby: 660mW (typ.) ◆ Flow-Through or Pipelined output mode on either port via the FT/PIPE pin ◆ Counter enable and reset features ◆ Dual chip enables allow for depth expansion without additional logic ◆ Full synchronous operation on both ports – 4ns setup to clock and 1ns hold on all control, data, and addressinputs – Data input, address, and control registers – Fast 6.5ns clock to data out in the Pipelined output mode – Self-timedwriteallowsfastcycletime – 10nscycletime,100MHzoperationinthePipelinedoutputmode ◆ LVTTL- compatible, single 3.3V (±0.3V) power supply ◆ Industrial temperature range (–40°C to +85°C) is available for selected speeds ◆ Available in a 100 pin Thin Quad Flatpack (TQFP) package HIGH-SPEED 3.3V 64/32K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM IDT70V9089/79S/L 0 1 0/1 1 0/1 0 R/ WR OER CE0R CE1R FT/PIPER I/O Control MEMORY ARRAY Counter/ Address Reg. I/O Control 3750 drw 01 A15R(1) A0R CLKR ADSR CNTENR CNTRSTR A0L CLKL ADSL A15L(1) CNTENL CNTRSTL Counter/ Address Reg. R/ WL CE0L OEL CE1L I/O0L -I/O7L I/O0R -I/O7R , 0 1 0/1 1 0/1 0 FT/PIPEL NOTE: 1. A15X is a NC for ID70V9079. |
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