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CS8952 Datasheet(PDF) 11 Page - Cirrus Logic |
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CS8952 Datasheet(HTML) 11 Page - Cirrus Logic |
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11 / 82 page  CS8952 CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 11 100BASE-TX MII TRANSMIT TIMING - 4B/5B ALIGN MODES Parameter Symbol Min Typ Max Unit TXD[3:0] Setup to TX_CLK High tSU1 10 - - ns TX_EN Setup to TX_CLK High tSU2 10 - - ns TXD[3:0] Hold after TX_CLK High tHD1 0- - ns TX_ER Hold after TX_CLK High tHD2 0- - ns TX_EN Hold after TX_CLK High tHD3 0- - ns TX_EN “high” to CRS asserted latency tCRS1 -8 BT TX_EN “low” to CRS de-asserted latency tCRS2 -8 BT TX_EN “high” to TX+/- output (TX Latency) tLAT 678 BT TX_CLK TX_EN TXD[3:0], CRS TX+/- tSU2 tSU1 tHD2 tHD1 tCRS1 tCRS2 tLAT Input/Output Input Input Output Output TX_ER/TXD4 Data IN Symbol Out |
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