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SI91842DT-18-T1 Datasheet(PDF) 9 Page - Vishay Siliconix |
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SI91842DT-18-T1 Datasheet(HTML) 9 Page - Vishay Siliconix |
9 / 9 page Si91842/4 Vishay Siliconix New Product Document Number: 71732 S-20478—Rev. C, 01-Apr-02 www.vishay.com 9 BLOCK DIAGRAM Si91842/4 VIN Reference – + Thermal Sensor Shutdown Control GND ERROR VOUT Reverse Polarity Protection Current Limit SD Si91842 Only DETAILED DESCRIPTION The Si91842/4 is a low-noise, low drop-out and low quiescent current linear voltage regulator, packaged in a small footprint SOT23-5 package. The Si91842/4 can supply loads up to 300 mA. As shown in the block diagram, the circuit consists of a bandgap reference, error amplifier, p-channel pass transistor and feedback resistor string. Additional blocks, not shown in the block diagram, include a precise current limiter, reverse battery and current protection, and thermal sensor. Thermal Overload Protection The thermal overload protection limits the total power dissipation and protects the device from being damaged. When the junction temperature exceeds 150 _, the device turns the p-channel pass transistor off. Reverse Battery Protection The Si91842/4 has a battery reverse protection circuitry that disconnects the internal circuitry when VIN drops below the GND voltage. There is no current drawn in such an event. When the SD pin is hardwired to VIN, the user must connect the SD pin to VIN via a 100-kW resistor if reverse battery protection is desired. Hardwiring the SD pin directly to the VIN pin is allowed when reverse battery protection is not desired. ERROR ERROR is an open drain output that goes low when VOUT is less than 4% of its normal value. To obtain a logic level output, connect a pull-up resister from ERROR to VOUT or any other voltage equal to or less than VIN. ERROR pin is high impedance (off) when SD pin is low. Auto-Discharge/No-Discharge VOUT has an internal 100-W (typ.) discharge path to ground when SD pin is low for the Si91842. the Si91844 does not have a discharge path when the SD pin is low. Stability The circuit is stable with only a small output capacitor equal to 6 nF/mA (= 1 mF @ 150 mA). Since the bandwidth of the error amplifier is around 1–3 MHz and the dominant pole is at the output node, the capacitor should be capacitive in this range, i.e., for 150-mA load current, an ESR <0.4 W is necessary. Parasitic inductance of about 10 nH can be tolerated. |
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