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MM54C48J Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM54C48J Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 6 page  TLF5883 March 1988 MM54C48MM74C48 BCD-to-7 Segment Decoder General Description The MM54C48MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transis- tors Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its com- plement available to the seven decoding AND-OR-INVERT gates The remaining NAND gate and three input buffers provide test-blanking inputripple-blanking output and rip- ple-blanking inputs Features Y Wide supply voltage range 30V to 15V Y Guaranteed noise margin 10V Y High noise immunity 045 VCC (typ) Y Low power fan out of 2 TTL compatibility driving 74L Y High current sourcing output (up to 50 mA) Y Ripple blanking for leading or trailing zeros (optional) Y Lamp test provision Connection Diagram Dual-In-Line Package TLF5883 – 1 Top View Order Number MM54C48 or MM74C48 Segment Identification TLF5883 – 2 Numerical Designations and Resultant Displays TLF5883 – 3 C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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