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MX10C8050FI Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers |
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MX10C8050FI Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 14 page 3 P/N:PM0591 REV. 0.3, APR. 09, 1999 MX10C805X PIN DESCRIPTIONS VCC : Supply voltage. VSS : Circuit ground. Port 0 : Port 0 is an 8-bit, open drain, bidirectional I/O port. As an output port each pin can sink several LS TTL inputs. Port 0 pins that have 1's written to them float, and in that state can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external Program and Data Memory. In this application it uses strong internal pullups when emitting 1's, and can source and sink serveral LS TTL inputs. Port 1 : Port 1 is an 8-bit bidirectional I/O port with inter- nal pullups. The port 1 output buffers can drive LS TTL inputs. Port 1 pins that have 1's written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 1 pins that are exter- nally pulled low will source current (IIL, on the data sheet) because of the internal pullups. In additional, Port 1 serves the functions of the following special features of the MX10C805X : Port Pin Alternate Function P1.0 T2 (External Count Input to Timer/ Counter 2), Clock-Out P1.1 T2EX (Timer/Counter 2 Capture/Reload Trigger and Direction Control) Port 2 : Port 2 is an 8-bit bidirectional I/O port with inter- nal pullups. The port 2 output buffers can drive LS TTL inputs. Port 2 pins that have 1's written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 2 pins that are exter- nally pulled low will source current (IIL, on the data sheet) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external Program Memory and during accesses to external Data Memory that use 16-bit addresses (MOVX @DPTR). In this application it uses strong internal pullups when emitting 1's. During accesses to external Data Memory that use 8-bit addresses (MOVX @Ri), Port 2 emits the contents of the P2 Special Function Register. Port 3 : Port 3 is an 8-bit bidirectional I/O port with inter- nal pullups. The port 3 output buffers can drive LS TTL inputs. Port 3 pins that have 1's written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 3 pins that are exter- nally pulled low will source current (IIL, on the data sheet) because of the internal pullups. Port 3 also serves the function of various special fea- tures of the 8051 Family, as listed below : Port Pin Alternate Function P3.0 RXD (serial input port) P3.1 TXD (serial output port) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (Timer 0 external input) P3.5 T1 (Timer 1 external input) P3.6 WR (external data memory write sttobe) P3.7 RD (external data memory read strobe) PROCESS INFORMATION This device is manufactured on a MXIC CMOS process. PACKAGES MX10C805 1 P C Temperature C=0°C to 70°C I=-40°C to 85°C Package P=PDIP Q=PLCC F=PQFP ROM Size 0=64K Bytes 1=4K Bytes 2=8K Bytes 4=16K Bytes 8=32K Bytes |
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