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DS26502 Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # DS26502
Description  T1/E1/J1/64KCC BITS Element
Download  124 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS26502 Datasheet(HTML) 3 Page - Maxim Integrated Products

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DS26502 T1/E1/J1/64KCC BITS Element
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7.7
INTERRUPT INFORMATION REGISTERS..............................................................................38
8.
T1 FRAMER/FORMATTER CONTROL REGISTERS ....................................................39
8.1
T1 CONTROL REGISTERS ...............................................................................................39
9.
E1 FRAMER/FORMATTER CONTROL REGISTERS....................................................45
9.1
E1 CONTROL REGISTERS ...............................................................................................45
9.2
E1 INFORMATION REGISTERS..........................................................................................47
10.
I/O PIN CONFIGURATION OPTIONS ............................................................................51
11.
T1 SYNCHRONIZATION STATUS MESSAGE ..............................................................54
11.1
T1 BIT-ORIENTED CODE (BOC) CONTROLLER ................................................................54
11.2
TRANSMIT BOC.............................................................................................................54
11.3
RECEIVE BOC...............................................................................................................55
12.
E1 SYNCHRONIZATION STATUS MESSAGE ..............................................................63
12.1
SA/SI BIT ACCESS BASED ON CRC4 MULTIFRAME...........................................................63
12.2
ALTERNATE SA/SI BIT ACCESS BASED ON DOUBLE-FRAME...............................................73
13.
LINE INTERFACE UNIT (LIU) ........................................................................................76
13.1
LIU OPERATION ............................................................................................................77
13.2
LIU RECEIVER ..............................................................................................................77
13.2.1 Receive Level Indicator............................................................................................77
13.2.2 Receive G.703 Section 10 Synchronization Signal ..................................................78
13.2.3 Monitor Mode ...........................................................................................................78
13.3
LIU TRANSMITTER.........................................................................................................78
13.3.1 Transmit Short-Circuit Detector/Limiter ....................................................................79
13.3.2 Transmit Open-Circuit Detector................................................................................79
13.3.3 Transmit BPV Error Insertion ...................................................................................79
13.3.4 Transmit G.703 Section 10 Synchronization Signal (E1 Mode)................................79
13.4
MCLK PRE-SCALER......................................................................................................79
13.5
JITTER ATTENUATOR......................................................................................................79
13.6
CMI (CODE MARK INVERSION) OPTION...........................................................................80
13.7
LIU CONTROL REGISTERS .............................................................................................81
13.8
RECOMMENDED CIRCUITS ..............................................................................................89
14.
LOOPBACK CONFIGURATION.....................................................................................94
15.
64KHZ SYNCHRONIZATION INTERFACE....................................................................95
15.1
RECEIVE 64KHZ SYNCHRONIZATION INTERFACE OPERATION ............................................95
15.2
TRANSMIT 64KHZ SYNCHRONIZATION INTERFACE OPERATION ..........................................96
16.
6312KHZ SYNCHRONIZATION INTERFACE................................................................97
16.1
RECEIVE 6312KHZ SYNCHRONIZATION INTERFACE OPERATION ........................................97
16.2
TRANSMIT 6312KHZ SYNCHRONIZATION INTERFACE OPERATION.......................................97
17.
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ...................98
17.1
INSTRUCTION REGISTER...............................................................................................102
17.2
TEST REGISTERS.........................................................................................................103


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