DS1388Z-5 datasheet(6/18 Pages) MAXIM

Part #	DS1388Z-5

Description	I2C RTC/Supervisor with Trickle Charger and 512 Bytes EEPROM

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Manufacturer	MAXIM [Maxim Integrated Products]

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6 / 18 page

I2C RTC/Supervisor with Trickle Charger

and 512 Bytes EEPROM

6

_____________________________________________________________________

WARNING: Under no circumstances are negative undershoots, of any

amplitude, allowed when device is in write protection.

Note 1:

Limits at -40°C are guaranteed by design and are not production tested.

Note 2:

All voltages are referenced to ground.

Note 3:

Measured at VCC = typ, VBACKUP = 0V, register 0Ah, block 0h = A5h.

Note 4:

The use of the 250

Ω trickle-charge resistor is not allowed at VCC > 3.63V and should not be enabled.

Note 5:

Measured at VCC = typ, VBACKUP = 0V, register 0Ah, block 0h = A6h.

Note 6:

Measured at VCC = typ, VBACKUP = 0V, register 0Ah, block 0h = A7h.

Note 7:

The RST pin has an internal 50k

Ω pullup resistor to VCC.

Note 8:

ICCA—SCL clocking at max frequency = 400kHz.

Note 9:

Specified with I2C bus inactive.

Note 10: Measured with a 32.768kHz crystal attached to X1 and X2.

Note 11: After this period, the first clock pulse is generated.

Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal)

to bridge the undefined region of the falling edge of SCL.

Note 13: The maximum tHD:DAT need only be met if the device does not stretch the LOW period (tLOW) of the SCL signal.

Note 14: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT

≥ 250ns must then be met. This

is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the

LOW period of the SCL signal, it must output the next data bit to the SDA line tR(MAX) + tSU:DAT = 1000 + 250 = 1250ns

before the SCL line is released.

Note 15: CB—total capacitance of one bus line in pF.

Note 16: The parameter tOSF is the period of time that the oscillator must be stopped for the OSF flag to be set over the voltage

range of 0V

≤ VCC ≤ VCC(MAX) and 1.3V ≤ VBACKUP ≤ 3.7V.

Note 17: If the oscillator is disabled or stopped, RST goes inactive after tRST plus the startup time of the oscillator.

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