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CY2CC1910 Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY2CC1910
Description  1:10 Clock Fanout Buffer with Output Enable
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2CC1910 Datasheet(HTML) 4 Page - Cypress Semiconductor

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COMLINK™ SERIES
CY2CC1910
Document #: 38-07347 Rev. *B
Page 4 of 8
Parameter Measurement Information:
VDD @ 3.3V–2.5V
Notes:
4.
CL includes probe and jig capacitance.
5.
All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z0 = 50Ω, tR < 2.5 nS, tF < 2.5 nS.
6.
The outputs are measured one at a time with one transition per measurement.
7.
TPLH and TPHL are the same as tpd.
AC Switching Characteristics @ 3.3V VDD = 3.3V ± 5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
Typ.
Max.
Unit
tPLH
Propagation Delay – Low to High
Figure 3
1.5
2.7
3.5
nS
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
nS
tR
Output Rise Time
0.8
V/nS
tF
Output Fall Time
0.8
V/nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase)
Figure 10
0.2
nS
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output (tPHL
– tPLH).
Figure 9
0.2
nS
tSK(t)
Package Skew: Skew between outputs of different packages at the same
power supply Voltage, temperature and package type.
Figure 11
0.4
nS
AC Switching Characteristics @ 2.5V VDD = 2.5V ± 5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
Typ.
Max.
Unit
tPLH
Propagation Delay – Low to High
Figure 3
1.5
2.7
3.5
nS
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
nS
tR
Output Rise Time
0.8
V/nS
tF
Output Fall Time
0.8
V/nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase)
Figure 10
0.2
nS
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output (tPHL
– tPLH).
Figure 9
0.2
nS
tSK(t)
Package Skew: Skew between outputs of different packages at the
same power supply Voltage, temperature and package type.
Figure 11
0.4
nS
AC Switching Characteristics @ 1.8V VDD = 1.8V ± 5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
Typ.
Max.
Unit
tPLH
Propagation Delay – Low to High
Figure 7
1.5
2.7
3.5
nS
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
nS
tR
Output Rise Time 20–80%
0.2
1.5
nS
tF
Output Fall Time 20–80%
0.2
1.5
nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase)
Figure 10
0.2
nS
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output (tPHL
– tPLH).
Figure 9
0.2
nS
tSK(t)
Package Skew: Skew between outputs of different packages at the same
power supply Voltage, temperature and package type.
Figure 11
0.4
nS
From Output
Under Test
C
L = 50 pF
500 ohm
Figure 2. Load Circuit [4,5,6]
VDD/2
t
PLH
t
PHL
V
OH
V
OL
0 V
Input
Output
VDD/2
VDD/2
VDD/2
0.8VDD
Figure 3. Voltage Waveforms Propagation Delay Times[7]


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