AD9480-LVDS-PCB3 datasheet(6/28 Pages) AD

Part #	AD9480-LVDS-PCB3

Description	8-Bit, 250 MSPS 3.3 V A/D Converter

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Manufacturer	AD [Analog Devices]

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AD9480

Rev. 0 | Page 6 of 28

SWITCHING SPECIFICATIONS

AVDD = 3.3 V, DRVDD = 3.3 V; differential encode input, unless otherwise noted.

Table 4.

AD9480-250

Parameter

Temp

Test Level

Min

Typ

Max

Unit

Full

VI

250

MSPS

Full

VI

20

MSPS

Full

IV

1.2

2

ns

CLOCK

Maximum Conversion Rate

Minimum Conversion Rate

Clock Pulse Width High (tEH)

Clock Pulse Width Low (tEL)

Full

IV

1.2

2

ns

Full

VI

1.9

ns

Full

VI

2.8

3.8

ns

Full

V

0.5

ns

Full

V

0.5

ns

Full

VI

1.9

2.7

3.7

ns

Full

IV

0

0.1

0.6

ns

OUTPUT PARAMETERS

Valid Time (tV)1

Propagation Delay (tPD)1

Rise Time (tR) 20% to 80%

Fall Time (tF) 20% to 80%

DCO Propagation Delay (tCPD)

Data-to-DCO Skew (tPD – tCPD)

Pipeline Latency

25

°C

VI

8

Cycles

APERTURE

Aperture Delay (tA)

25

°C

V

1.5

ns

Aperture Uncertainty (Jitter)

25

°C

V

0.25

ps rms

1 Valid Time is approximately equal to minimum tPD. CLoad equals 5 pF maximum.

TIMING DIAGRAM

N–1

N

N+1

N+8

N+9

N+10

N+11

tEH

tEL

1/fS

tA

N–8

tPD

8 CYCLES

tV

N–7

N

N+1

N+2

tCPD

CLK+

CLK–

DATA

OUT

DCO–

DCO+

AIN

Figure 2. Timing Diagram

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