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EM614163A Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # EM614163A
Description  256K x 16 High Speed EDO DRAM
Download  23 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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EM614163A Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

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EtronTech
Em614163A-30/35/40/45
Preliminary
7
April 1997
Read Cycle
Em614163A
Parameter
Symbol
-30/35/40/45
Unit
Notes
Min
Max
Access time from RAS
tRAC
¡Ð
30/35/40/45
ns
13
Access time from U/LCAS
tCAC
¡Ð
9/10/11/12
ns
14, 15, 16
Access time from column address
tAA
¡Ð
16/18/20/22
ns
15, 17
Access time from OE
tOEA
¡Ð
9/9/10/10
ns
Read command setup time
tRCS
0
¡Ð
ns
8
Read command hold time to U/LCAS
tRCH
0
¡Ð
ns
11, 18
Read command hold time to RAS
tRRH
0
¡Ð
ns
18
Output buffer turn-off time
tOFF
0
6/7/8/8
ns
19
Output buffer turn-off OE
tOEZ
0
6/7/8/8
ns
19
Write Cycle
Write command setup time
tWCS
0
¡Ð
ns
8, 20
Write command hold time
tWCH
5/6/6/6
¡Ð
ns
8
Write command pulse width
tWP
5/6/6/6
¡Ð
ns
Write command to RAS lead time
tRWL
10
¡Ð
ns
Write command to U/LCAS lead time
tCWL
5/5/6/6
¡Ð
ns
21
Data-in setup time
tDS
0
¡Ð
ns
22
Data-in hold time
tDH
5/6/6/7
¡Ð
ns
22
OE hold time from WE
tOEH
5/6/6/6
¡Ð
ns
Read-Modify-Write Cycle
Em614163A
Parameter
Symbol
-30/35/40/45
Unit
Notes
Min
Max
Read-modify-write cycle time
tRWC
73/83/90/100
¡Ð
ns
1
RAS to WE delay time
tRWD
41/49/54/60
¡Ð
ns
20
U/LCAS to WE delay time
tCWD
20/24/25/27
¡Ð
ns
20
Column address to WE delay time
tAWD
33/40/44/49
¡Ð
ns
20
Refresh Cycle
U/LCAS setup time
(CAS -before-RAS refresh cycle)
tCSR
6/7/8/9
¡Ð
ns
8
U/LCAS hold time
(CAS -before-RAS refresh cycle)
tCHR
7/8/9/10
¡Ð
ns
11
RAS precharge to U/LCAS hold time
tRPC
5
¡Ð
ns
8
U/LCAS precharge time in normal mode
tCPN
5/5/5/6
¡Ð
ns
23


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