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NT5SV8M8DT-7 Datasheet(PDF) 11 Page - List of Unclassifed Manufacturers |
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NT5SV8M8DT-7 Datasheet(HTML) 11 Page - List of Unclassifed Manufacturers |
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11 / 21 page  NT5SV16M4DT NT5SV8M8DT NT5SV4M16DT 64Mb Synchronous DRAM REV 1.1 10/01 11 © NANYA TECHNOLOGY CORP. All rights reserved. NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice. Read with Auto Pre- charge L L L L OP Code Mode Register Set ILLEGAL L L L H X X Auto or Self Refresh ILLEGAL L L H L BS X Precharge ILLEGAL 4 L L H H BS Row Address Bank Activate ILLEGAL 4 L H L L BS Column Write ILLEGAL 4 L H L H BS Column Read ILLEGAL 4 L H H L X X Burst Termination ILLEGAL L H H H X X No Operation Continue the Burst H X X X X X Device Deselect Continue the Burst Write with Auto Precharge L L L L OP Code Mode Register Set ILLEGAL L L L H X X Auto or Self Refresh ILLEGAL L L H L BS X Precharge ILLEGAL 4 L L H H BS Row Address Bank Activate ILLEGAL 4 L H L L BS Column Write ILLEGAL 4 L H L H BS Column Read ILLEGAL 4 L H H L X X Burst Termination ILLEGAL L H H H X X No Operation Continue the Burst H X X X X X Device Deselect Continue the Burst Precharging L L L L OP Code Mode Register Set ILLEGAL L L L H X X Auto or Self Refresh ILLEGAL L L H L BS X Precharge No Operation; Bank(s) idle after tRP L L H H BS Row Address Bank Activate ILLEGAL 4 L H L L BS Column Write ILLEGAL 4 L H L H BS Column Read ILLEGAL 4 L H H L X X Burst Termination No Operation; Bank(s) idle after tRP L H H H X X No Operation No Operation; Bank(s) idle after tRP H X X X X X Device Deselect No Operation; Bank(s) idle after tRP Row Activating L L L L OP Code Mode Register Set ILLEGAL L L L H X X Auto or Self Refresh ILLEGAL L L H L BS X Precharge ILLEGAL 4 L L H H BS Row Address Bank Activate ILLEGAL 4, 10 L H L L BS Column Write ILLEGAL 4 L H L H BS Column Read ILLEGAL 4 L H H L X X Burst Termination No Operation; Row Active after tRCD L H H H X X No Operation No Operation; Row Active after tRCD H X X X X X Device Deselect No Operation; Row Active after tRCD Current State Truth Table (Part 2 of 3)(See note 1) Current State Command Action Notes CS RAS CAS WE BS0,BS1 A11 - A0 Description 1. CKE is assumed to be active (high) in the previous cycle for all entries. The Current State is the state of the bank that the Command is being applied to. 2. All Banks must be idle; otherwise, it is an illegal action. 3. If CKE is active (high) the SDRAM will start the Auto (CBR) Refresh operation, if CKE is inactive (low) than the Self Refresh mode is entered. 4. The Current State refers to only one of the banks. If BS selects this bank then the action is illegal. If BS selects the bank not being refer- enced by the Current State then the action may be legal depending on the state of that bank. 5. If CKE is inactive (low) then the Power Down mode is entered; otherwise there is a No Operation. 6. The minimum and maximum Active time (tRAS) must be satisfied. 7. The RAS to CAS Delay (tRCD) must occur before the command is given. 8. Column address A10 is used to determine if the Auto Precharge function is activated. 9. The command must satisfy any bus contention, bus turn around, and/or write recovery requirements. 10. The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied. |
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