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Notice: The information in this document is subject to change without notice

ASM690A / 692A

ASM802L / 802M

ASM805L

µP Power Supply Supervisor With Battery Backup Switch

rev 1.0

October 2003

Pin Configuration

1

2

3

4

5

6

7

8

GND

PFI

RESET (RESET)

WDI

PFO

Plastic/CerDip/SO

ASM690A

ASM692A

ASM802L

ASM802M

(ASM805L)

Pin Description

Pin Number

Name

Function

ASM690A /

ASM692A

ASM802L /

ASM802M

ASM805L

11

higher) through the MOS switch to provide continuous power to the CMOS RAM.

22

+5V power supply input.

3

3

GND

Ground

44

PFI

Power failure monitor input. PFI is connected to the internal power fail comparator

which is referenced to 1.25V. The power fail output (PFO) is active LOW but

remains HIGH if PFI is above 1.25V. If this feature is unused, the PFI pin should be

55

PFO

Power-fail output. PFO is active LOW whenever the PFI pin is less than 1.25V.

66

WDI

Watchdog input. The WDI input monitors microprocessor activity. An internal timer

is reset with each transition of the WDI input. If the WDI is held HIGH or LOW for

longer than the watchdog timeout period, typically 1.6 seconds, RESET (or RESET)

7

-

RESET

or by watchdog timer timeout, RESET (or RESET) pulses low for the reset pulse

(4.65V in ASM690A / ASM802L and 4.4V in the ASM692A / ASM802L) and

-

7

RESET

Active-HIGH reset output. The inverse of RESET.

88

function is not used. The input has about 40mV of hysteresis to prevent rapid tog-