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IDT70V658S10DRI Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT70V658S10DRI Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 23 page IDT70V658S Preliminary High-Speed 3.3V 64K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges 2 Description The IDT70V658 is a high-speed 64K x 36 Asynchronous Dual-Port Static RAM. The IDT70V658 is designed to be used as a stand-alone 2304K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual- Port RAM for 72-bit-or-more word system. Using the IDT MASTER/ SLAVE Dual-Port RAM approach in 72-bit or wider memory system applicationsresultsinfull-speed,error-freeoperationwithouttheneedfor additionaldiscretelogic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. The 70V658 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controlled by the OPT pins. The power supply for the core of the device (VDD) remains at 3.3V. Pin Configurations(1,2,3,4) NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V) 3. All VSS pins must be connected to ground. 4. Package body is approximately 15mm x 15mm x 1.4mm with 0.8mm ball pitch. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part-marking. 17 16 15 14 12 13 10 9 8 7 6 5 4 3 2 1 11 A B C D E F G H J K L M N P R T U I/O19L I/O18L VSS A4L INTL SEML BE1L A8L A12L NC VSS I/O17L OPTL A0L I/O20R VSS I/O18R NC A1L A5L BUSYL VSS CE0L CE1L BE2L A9L A13L NC I/O16L VDDQR VSS VDDQL I/O19R VDDQR VDD A2L A6L R/WL VSS BE3L A10L A14L NC I/O15L I/O16R VDD I/O22L VSS I/O21L I/O20L VDD A3L NC OEL I/O23L I/O22R VDDQR I/O21R VDDQL I/O23R I/O24L VSS I/O26L VSS I/O25L I/O24R VDD I/O26R VDDQR I/O25R VDDQL VDD VSS VSS I/O29R I/O28L VDDQR VDDQL I/O29L I/O30R VSS I/O14R VDDQL I/O14L A15L A11L A7L BE0L I/O12L I/O13R VSS I/O13L VSS I/O12R I/O11L I/O9L VDDQL I/O10L I/O11R VDD I/O9R VSS I/O10R VSS VDDQR I/O7R VDDQL I/O8R VSS I/O8L VSS I/O7L I/O6R A0R A1R A2R A3R A4R A5R A6R I/O3R I/O31L VSS I/O31R I/O30L NC A12R A8R BE1R VDD SEMR INTR VDDQR I/O2L I/O3L VSS I/O4L VSS I/O33L I/O34R NC A13R A9R BE2R CE0R CE1R VDD VSS BUSYR VSS VDD VSS VDDQL I/O1R VDDQR I/O33R I/O34L VDDQL NC NC A14R A10R BE3R VSS I/O4R I/O6L VSS I/O5R I/O2R VSS I/O35L VDD A15R A11R A7R BE0R OER M/S R/WR VDDQL I/O5L OPTR I/O0L I/O1L 70V658BF BF-208(5) 208-Ball fpBGA Top View(6) 5613 tbl 02b I/O27L I/O28R VSS I/O27R VSS I/O32R I/O32L VDDQR I/O35R A B C D E F G H J K L M N P R T U VSS I/O0R I/O17R VDDQR VSS VDD VSS I/O15R VDD VDD TDO TDI TCK TMS TRST |
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