M470L3224FT0 datasheet(6/20 Pages) SAMSUNG

Part #	M470L3224FT0

Description	DDR SDRAM SODIMM

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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DDR SDRAM

128MB, 256MB SODIMM

Rev. 1.2 March 2004

256MB, 32M x 64 Non ECC Module (M470L3224FT0) (Populated as 2 bank of x16 DDR SDRAM Module)

CS1

CS0

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D0

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LDQS

CS

A0

Serial PD

A1

A2

SA0

SA1

SA2

SCL

SDA

WP

VSS

D0 - D7

VDD/VDDQ

D0 - D7

VREF

VDDSPD

SPD

Clock Wiring

Clock

Input

SDRAMs

CK0/CK0

CK1/CK1

CK2/CK2

4 SDRAMs

NC

LDM

LDQS

LDM

DQS0

DM0

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D4

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

UDQS

UDM

UDQS

UDM

DQS1

DM1

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D2

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LDQS

CS

LDM

LDQS

LDM

DQS4

DM4

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D6

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

UDQS

UDM

UDQS

UDM

DQS5

DM5

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LDQS

CS

LDM

LDQS

LDM

DQS2

DM2

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D5

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

UDQS

UDM

UDQS

UDM

DQS3

DM3

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D3

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LDQS

CS

LDM

LDQS

LDM

DQS6

DM6

I/0 0

I/0 1

I/0 2

I/0 3

I/0 4

I/0 5

I/0 6

D7

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

UDQS

UDM

UDQS

UDM

DQS7

DM7

I/0 8

I/0 9

I/0 10

I/0 11

I/0 12

I/0 13

I/0 14

A0 - A12

A0-A12: DDR SDRAMs D0 - D7

BA0 - BA1

BA0-BA1: DDR SDRAMs D0 - D7

RAS

RAS: SDRAMs D0 - D7

CAS

CAS: SDRAMs D0 - D7

CKE0

CKE: SDRAMs D0 - D3

WE

WE: SDRAMs D0 - D7

CKE1

CKE: SDRAMs D4 - D7

Notes:

1. DQ-to-I/O wiring is shown as recom-

mended but may be changed.

2. DQ/DQS/DM/CKE/CS relationships must

be maintained as shown.

3. DQ, DQS, DM/DQS resistors: 22 Ohms.

Functional Block Diagram

*Clock Net Wiring

Card

Edge

D0/D2/Cap

D1/D3/Cap

D4/D6/Cap

D5/D7/Cap

R=120

Ω

CK0/1/2

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