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MM74HC640J Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM74HC640J Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF5344 January 1988 MM54HC640MM74HC640 Inverting Octal TRI-STATE Transceiver MM54HC643MM74HC643 True-Inverting Octal TRI-STATE Transceiver General Description These TRI-STATE bi-directional buffers utilize advanced sili- con-gate CMOS technology and are intended for two-way asynchronous communication between data buses They have high drive current outputs which enable high speed operation even when driving large bus capacitances These circuits possess the low power consumption and high noise immunity usually associated with CMOS circuitry yet have speeds comparable to low power Schottky TTL circuits Each device has an active low enable G and a direction control input DIR When DIR is high data flows from the A inputs to the B outputs When DIR is low data flows from the B inputs to the A outputs The MM54HC640 MM74HC640 transfers inverted data from one bus to other and the MM54HC643MM74HC643 transfers inverted data from the A bus to the B bus and true data from the B bus to the A bus These devices can drive up to 15 LS-TTL Loads and all inputs are protected from damage due to static discharge by diodes to VCC and ground Features Y Typical propagation delay 13 ns Y Wide power supply range 2 – 6V Y Low quiescent current 80 mA maximum (74 HC) Y TRI-STATE outputs for connection to bus oriented systems Y High output drive 6 mA (min) Connection Diagrams Dual-In-Line Package TLF5344 – 1 Top View Order Number MM54HC640 or MM74HC640 Dual-In-Line Package TLF5344 – 2 Top View Order Number MM54HC643 or MM74HC643 Truth Table Control Operation Inputs G DIR 640 643 LL B data to A bus B data to A bus LH A data to B bus A data to B bus H X Isolation Isolation H e high level L e low level X e irrelevant TRI-STATE is a registered trademark of National Semiconductor Corp C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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