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EN29F002AB-45TC Datasheet(PDF) 8 Page - Eon Silicon Solution Inc.

Part # EN29F002AB-45TC
Description  2 Megabit (256K x 8-bit) Flash Memory
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Manufacturer  EON [Eon Silicon Solution Inc.]
Direct Link  http://www.essi.com.tw
Logo EON - Eon Silicon Solution Inc.

EN29F002AB-45TC Datasheet(HTML) 8 Page - Eon Silicon Solution Inc.

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This Data Sheet may be revised by subsequent versions
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
8
EN29F002A / EN29F002AN
Rev. A, Issue Date: 2003/03/26
Table 5. EN29F002A Command Definitions
Command
Sequence
Read/Reset
Write
Cycles
Req’d
1
st
Write Cycle
2
nd
Write Cycle
3
rd
Write Cycle
4
th
Write Cycle
5
th
Write Cycle
6
th
Write Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/Reset
1
XXXh F0h
RA
RD
Read/Reset
4
555h
AAh AAAh 55h
555h
F0h
RA
RD
AutoSelect
Manufacturer ID
4
555h
AAh AAAh 55h
555h
90h
000h/
100h
7Fh/
1Ch
AutoSelect Device ID
(Top Boot)
4
555h
AAh AAAh 55h
555h
90h
001h/
101h
7Fh/
92h
AutoSelect Device ID
(Bottom Boot)
4
555h
AAh AAAh 55h
555h
90h
001h/
101h
7Fh/
97h
AutoSelect Sector
Protect Verify
4
555h
AAh AAAh 55h
555h
90h
SA &
02h
00h/
01h
Byte Program
4
555h
AAh AAAh 55h
555h
A0h
PA
PD
Chip Erase
6
555h
AAh AAAh 55h
555h
80h
555h
AAh AAAh 55h
555h
10h
Sector Erase
6
555h
AAh AAAh 55h
555h
80h
555h
AAh AAAh 55h
SA
30h
Sector Erase Suspend
1
xxxh
B0h
Sector Erase Resume
1
xxxh
30h
Notes:
RA = Read Address: address of the memory location to be read. This one is a read cycle.
RD = Read Data: data read from location RA during Read operation. This one is a read cycle.
PA = Program Address: address of the memory location to be programmed
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the sector to be erased. Address bits A17-A13 uniquely select any sector.
The data is 00h for an unprotected sector and 01h for a protected sector.
Byte Programming Command
Programming the EN29F002A is performed on a byte-by-byte basis using a four bus-cycle operation
(two unlock write cycles followed by the Program Setup command and Program Data Write cycle).
When the program command is executed, no additional CPU controls or timings are necessary. The
program operation is terminated automatically by an internal timer. Address is latched on the falling
edge of CE or WE , whichever is last; data is latched on the rising edge of CE or WE , whichever
is first. The program operation is completed when EN29F002A returns the equivalent data to the
programmed location.
Programming status may be checked by sampling data on DQ7 (DATA polling) or on DQ6 (toggle
bit). Changing data from 0 to 1 requires an erase operation. When programming time limit is
exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read
mode.
EN29F002A ignores commands written during Byte Programming. If a hardware RESET occurs
during Byte Programming, data at the programmed location may get corrupted. Programming is
allowed in any sequence and across any sector boundary.
Chip Erase Command
An auto Chip Erase algorithm is employed when the Chip Erase command sequence is performed.
Although the Chip Erase command requires six bus cycles: two unlock write cycles, a setup
command, two additional unlock write cycles and the chip erase command, the user does not need


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