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IDT7052 Datasheet(PDF) 10 Page - Integrated Device Technology

Part # IDT7052
Description  HIGH-SPEED 2K x 8 FourPort STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7052 Datasheet(HTML) 10 Page - Integrated Device Technology

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6.42
IDT7052S/L
High-Speed 2K x 8 FourPort™ Static RAM
Military, Industrial and Commercial Temperature Ranges
10
Timing Waveform of Write with Port-to-Port Read(1,2,3)
Functional Description
The IDT7052 provides four ports with separate control, address, and
I/O pins that permit independent access for reads or writes to any location
in memory. These devices have an automatic power down feature
controlled by
CE. The CE controls on-chip power down circuitry that
permitstherespectiveporttogointostandbymodewhennotselected(
CE
= VIH). When a port is enabled, access to the entire memory array is
permitted. Each port has its own Output Enable control (
OE). In the read
mode, the port’s
OE turns on the output drivers when set LOW. READ/
WRITE conditions are illustrated in the table below.
Timing Waveform of Write with BUSY Input
NOTES:
1.
BUSY is aserted on Port "B" blocking R/W"B" until BUSY"B" goes HIGH.
Truth Table I – Read/Write Control(3)
NOTES:
1. "H" = VIH, "L" = VIL, "X" = Don’t Care, "Z "= High Impedance
2. If
BUSY = VIL, write is blocked.
3. For valid write operation, no more than one port can write to the same address
location at the same time.
NOTES:
1. Assume
BUSY input = VIH and CE = VIL for the writing port.
2.
OE = VIL for the reading ports.
3. All timing is the same for left and right ports. Port "A" may be either of the four ports and Port "B" is any other port.
2674 drw 11
ADDR"A"
tWC
DATA"B"
MATCH
tWP
R/W"A"
DATAIN"A"
ADDR"B"
tDH
VALID
MATCH
VALID
tDDD
tWDD
tDW
2674 drw 12
R/
W"A"
BUSY"B"
tWP
tWH
tWB
R/
W"B"
(1)
,
Any Port
(1)
R/
W
CE
OE
D0-7
Function
X
H
X
Z
Port Deselected: Power-Down
XH
X
Z
CEP1=CEP2=CEP3=CEP4=VIH
Power Down Mode ISB or ISB1
LL
X
DATAIN
Data on port written into memory
(2)
HL
L
DATAOUT
Data in memory output on port
X
X
H
Z
Outputs Disabled
2674 tbl 11


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