MAX6870 datasheet(5/51 Pages) MAXIM

Part #	MAX6870

Description	EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC

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Manufacturer	MAXIM [Maxim Integrated Products]

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EEPROM-Programmable Hex/Quad

Power-Supply Sequencers/Supervisors with ADC

_______________________________________________________________________________________

5

Note 1:

Specifications guaranteed for the stated global conditions. The device also meets the parameters specified when 0 < VIN1

< +6.5V, and at least one of VIN3 through VIN6 is between +2.7V and +5.5V, while the remaining VIN3 through VIN6 are

between 0 and +5.5V.

Note 2:

Device may be supplied from any one of IN_, except IN2.

Note 3:

The internal supply voltage, measured at ABP, equals the maximum of IN3 to IN6 if VIN1 = 0, or equals +5.4V if VIN1 >

+6.5V. For +4V < VIN1 < +6.5V and VIN3 through VIN6 > +2.7V, the input that powers the device cannot be determined.

Note 4:

100% production tested at TA = +25°C and TA = +125°C. Specifications at TA = -40°C are guaranteed by design.

Note 5:

VIN_ > 0.3 x ADC range.

Note 6:

Does not include the inaccuracy of the external +1.25V voltage reference.

Note 7:

DNL implicitly guaranteed by design in a sigma-delta converter.

Note 8:

CBUS = total capacitance of one bus line in pF. Rise and fall times are measured between 0.1 x VBUS and 0.9 x VBUS.

Note 9:

Input filters on SDA, SCL, A0, and A1 suppress noise spikes < 50ns.

Note 10: An additional cycle is required when writing to configuration memory for the first time.

TIMING CHARACTERISTICS

(IN1 = GND, VIN2 = +10V, VIN3 to VIN6 = +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA = -40°C to +85°C,

unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1 and 2)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

TIMING CHARACTERISTICS (Figure 2)

Serial Clock Frequency

fSCL

400

kHz

Clock Low Period

tLOW

1.3

µs

Clock High Period

tHIGH

0.6

µs

Bus-Free Time

tBUF

1.3

µs

START Setup Time

tSU:STA

0.6

µs

START Hold Time

tHD:STA

0.6

µs

STOP Setup Time

tSU:STO

0.6

µs

Data-In Setup Time

tSU:DAT

100

ns

Data-In Hold Time

tHD:DAT

0

900

ns

Receive SCL/SDA Minimum Rise Time

tR

(Note 8)

20 +

0.1 x

CBUS

ns

Receive SCL/SDA Maximum Rise Time

tR

(Note 8)

300

ns

Receive SCL/SDA Minimum Fall Time

tF

(Note 8)

20 +

0.1 x

CBUS

ns

Receive SCL/SDA Maximum Fall Time

tF

(Note 8)

300

ns

Transmit SDA Fall Time

tF

CBUS = 400pF

20 +

0.1 x

CBUS

300

ns

Pulse Width of Spike Suppressed

tSP

(Note 9)

50

ns

EEPROM Byte Write Cycle Time

tWR

(Note 10)

11

ms

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