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XRT91L81 Datasheet(PDF) 11 Page - Exar Corporation |
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XRT91L81 Datasheet(HTML) 11 Page - Exar Corporation |
11 / 40 page XRT91L81 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER PRELIMINARY REV. P1.0.3 9 RXI0P RXI0N CMLDIFF I C1 D1 Primary Receive Serial Data Input The receive serial data stream of 2.488Gbps is applied to the primary input pins if RXSEL is "Low". In Forward Error Correc- tion, the receive serial data stream is 2.666Gbps. RXI1P RXI1N CMLDIFF I G1 F1 Secondary Receive Serial Data Input Port The receive serial data stream of 2.488Gbps is applied to the secondary input pins if RXSEL is "High". In Forward Error Cor- rection, the receive serial data stream is 2.666Gbps. RXSEL LVTTL I A2 Receive Serial Data Select Hardware Mode This pin is used to select the Receive Serial Data Input from the primary or secondary inputs. "Low" = RXI0 "High" = RXI1 REXT - I A1 Limiting Amplifier Biasing Resistor This pin should be pulled "Low" with a 499 Ω resistor. RXCLK16P RXCLK16N LVDS O A6 A7 155.52 (166) MHz Reference Clock This output clock reference is derived from the recovered clock from the receive path. LOCKDET_CDR LVTTL O C7 CDR Lock Detect This pin will be pulled "High" to indicate that the CDR is locked. LOSEXT LVTTL I B5 LOS or SD input from optical module POLARITY LVTTL I C4 Polarity for LOS input Hardware Mode LOSEXT and POLARITY signals will be Exclussive NORed internally to generate the correct polarity. LOSDET LVTTL O C5 LOS Detect Flags LOS condition based on LOS/SD signal from optical module. DISRD LVTTL I A3 Disable Receive Output Data Upon LOS Hardware Mode If this pin is pulled "High", the receive output data will automically pull "Low" when a LOS condition occurs. "Low" = Disabled "High" = Mute Data Upon LOS RECEIVER SECTION NAME LEVEL TYPE PIN DESCRIPTION |
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Similar Description - XRT91L81 |
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