IS41C16256

IS41LV16256

Integrated Circuit Solution Inc.

1

DR001-0E 01/25/2002

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

FEATURES

• Extended Data-Out (EDO) Page Mode access cycle

• TTL compatible inputs and outputs; tristate I/O

• Refresh Interval: 512 cycles /8 ms

• Refresh Mode:

RAS-Only, CAS-before-RAS (CBR),

Hidden

• Single power supply:

5V

± 10% (IS41C16256)

3.3V

± 10% (IS41LV16256)

• Byte Write and Byte Read operation via two

CAS

DESCRIPTION

The

bit high-performance CMOS Dynamic Random Access Memo-

ries. The IS41C16256 offer an accelerated cycle access

called EDO Page Mode. EDO Page Mode allows 512 random

accesses within a single row with access cycle time as short

as 10 ns per 16-bit word. The Byte Write control, of upper and

lower byte, makes the IS41C16256 ideal for use in

16-, 32-bit wide data bus systems.

These features make the IS41C16256and IS41LV16256 ideally

suited for high-bandwidth graphics, digital signal processing,

high-performance computing systems, and peripheral

applications.

The IS41C16256 is packaged in a 40-pin 400mil SOJ and

400mil TSOP-2.

256K x 16 (4-MBIT) DYNAMIC RAM

WITH EDO PAGE MODE

KEY TIMING PARAMETERS

Parameter

-25(5V)

-35

-50

-60

Unit

Max.

25355060

ns

Max.

10101415

ns

12182530

ns

10122025

ns

456090

110

ns

40-Pin SOJ

PIN CONFIGURATIONS

40-Pin TSOP-2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

VCC

I/O0

I/O1

I/O2

I/O3

VCC

I/O4

I/O5

I/O6

I/O7

NC

NC

WE

RAS

NC

A0

A1

A2

A3

VCC

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

NC

LCAS

UCAS

OE

A8

A7

A6

A5

A4

GND

PIN DESCRIPTIONS

A0-A8

Address Inputs

I/O0-15

Data Inputs/Outputs

WE

Write Enable

OE

Output Enable

RAS

Row Address Strobe

UCAS

Upper Column Address Strobe

LCAS

Lower Column Address Strobe

Vcc

Power

GND

Ground

NC

No Connection

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

VCC

I/O0

I/O1

I/O2

I/O3

VCC

I/O4

I/O5

I/O6

I/O7

NC

NC

WE

RAS

NC

A0

A1

A2

A3

VCC

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

NC

LCAS

UCAS

OE

A8

A7

A6

A5

A4

GND