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IS41C16256-35TI Datasheet(PDF) 6 Page - Integrated Circuit Solution Inc |
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IS41C16256-35TI Datasheet(HTML) 6 Page - Integrated Circuit Solution Inc |
6 / 20 page IS41C16256 IS41LV16256 6 Integrated Circuit Solution Inc. DR001-0E 01/25/2002 ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter Test Condition Speed Min. Max. Unit IIL Input Leakage Current Any input 0V < VIN < Vcc –10 10 µA Other inputs not under test = 0V IIO Output Leakage Current Output is disabled (Hi-Z) –10 10 µA 0V < VOUT < Vcc VOH Output High Voltage Level IOH = –2.5 mA 2.4 — V VOL Output Low Voltage Level IOL =+2.1mA — 0.4 V ICC1 Standby Current: TTL RAS, LCAS, UCAS > VIH Commerical 5V — 2 mA Industrial 5V — 3 Commerical 3.3V — 1 Industrial 3.3V — 2 ICC2 Standby Current: CMOS RAS, LCAS, UCAS > VCC – 0.2V 5V — 1 mA 3.3V — 0.5 ICC3 Operating Current: RAS, LCAS, UCAS, -25 — 260 mA Random Read/Write(2,3,4) Address Cycling, tRC = tRC (min.) -35 — 230 Average Power Supply Current -50 — 180 -60 — 170 ICC4 Operating Current: RAS = VIL, LCAS, UCAS, -25 — 250 mA EDO Page Mode(2,3,4) Cycling tPC = tPC (min.) -35 — 220 Average Power Supply Current -50 — 170 -60 — 160 ICC5 Refresh Current: RAS Cycling, LCAS, UCAS > VIH -25 — 260 mA RAS-Only(2,3) tRC = tRC (min.) -35 — 230 Average Power Supply Current -50 — 180 -60 — 170 ICC6 Refresh Current: RAS, LCAS, UCAS Cycling -25 — 260 mA CBR(2,3,5) tRC = tRC (min.) -35 — 230 Average Power Supply Current -50 — 180 -60 — 170 Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed once each EDO page cycle. 5. Enables on-chip refresh and address counters. |
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