REV. PrC

PRELIMINARY TECHNICAL DATA

–8–

AD7451/AD7441

PIN CONFIGURATION µSOIC

PIN FUNCTION DESCRIPTION

Pin Mnemonic

Function

Reference Input for the AD7451/41. An external 2.5 V reference must be applied to this input.This pin

should be decoupled to GND with a capacitor of at least 0.1µF.

Non-Inverting Input.

a small DC offset to provide a pseudo ground.

G N D

Analog Ground. Ground reference point for all circuitry on the AD7451/41. All analog input

signals and any external reference signal should be referred to this GND voltage.

CS

Chip Select.

Active low logic input. This input provides the dual function of initiating a conversion on

the AD7451/41 and framing the serial data transfer.

SDATA

Serial Data. Logic Output. The conversion result from the AD7451/41 is provided on this out

put as a serial data stream. The bits are clocked out on the falling edge of the SCLK input.

The data

stream of the AD7451 consists of four leading zeros followed by the 12 bits of conversion data which

are provided MSB first; the data stream of the AD7441 consists of four leading zeros, followed by the

10-bits of conversion data, followed by two trailing zeros. In both cases, the output coding is Straight

(Natural) Binary.

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock

input is also used as the clock source for the conversion process.

Capacitor and a 10µF Tantalum Capacitor.

PIN CONFIGURATION 8-LEAD SOT-23

AD7451/AD7441

SOT-23

(Not to Scale)

TOP VIEW

1

2

3

4

5

6

7

8

VREF

VIN +

VIN -

GND

+5

SDATA

SCLK

VDD

AD7451/AD7441

µSOIC

(Not to Scale)

TOP VIEW

1

2

3

4

5

6

7

8

VREF

VIN +

VIN -

GND

+5

SDATA

SCLK

VDD