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AT45DB321C-CI Datasheet(PDF) 9 Page - ATMEL Corporation |
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AT45DB321C-CI Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 37 page  9 AT45DB321C [Preliminary] 3387B–DFLSH–9/04 Note: 1. Default value for devices shipped from Atmel. 2. When protecting or unprotecting sector 0b (pages 8-511), we recommend protecting or unprotecting the entire sector 0b simultaneously. ERASING THE SECTOR PROTECTION REGISTER: To erase the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, the 4-byte erase command sequence must be clocked in via the SI (serial input) pin. After the last bit of the command sequence has been clocked in, the CS pin must be deas- serted to initiate the internally self-timed erase cycle (t PE). The Ready/Busy status will indicate that the device is busy during the erase cycle. The erased state of each bit (of a byte) in the Sector Protection Register indicates that the corresponding sector is flagged for protection. The RESET pin is disabled during this erase cycle to prevent incomplete erasure of the Sector Protection Register. PROGRAMMING THE SECTOR PROTECTION REGISTER: To program the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, the 4-byte command sequence must be clocked in via the SI (serial input) pin. After the last bit of the command sequence has been clocked in, the data for the con- tents of the Sector Protection Register must be clocked in. The first byte corresponds to sector 0 (0a, 0b), the second byte corresponds to Sector 1 and the last byte (byte 16) corresponds to Sector 15. After the last bit of data has been clocked in, the CS pin must be deasserted to initiate the internally self-timed program cycle (t P). The Ready/Busy status will indicate that the device is busy during the program cycle. The RESET pin is disabled during this program cycle to prevent incomplete programming of the sector pro- tection register. READING THE SECTOR PROTECTION REGISTER: To read the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, a 4-byte command sequence 32H, 00H, 00H, 00H and 32 don’t care clock cycles must be clocked in via the SI (serial input) pin. The 32 don’t care clock cycles are required to ini- Sector 0 (0a, 0b): 0a 0b 0b – Data Value (Page 8-255) (Page 256-511) Bit 6, 7 Bit 4, 5 Bit 2, 3 Bit 0, 1 Sectors 0a, 0b Unprotected 00 00 00 00 00H Protect Sector 0a 11 00 00 00 C0H Protect Sector 0b (Page 8-255) 00 11 00 00 30H Protect Sector 0b (Page 256-511) 00 00 11 00 0CH Protect Sectors 0a, 0b (Page 8-255), 0b (Page 256-511)(1) 11 11 11 00 FCH Protect Sectors 0a, 0b (Page 8-255) 11 11 00 00 F0H Command Byte 1 Byte 2 Byte 3 Byte 4 Erase Sector Protection Register 3DH 2AH 7FH CFH Command Byte 1 Byte 2 Byte 3 Byte 4 Program Sector Protection Register 3DH 2AH 7FH FCH |
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