CY2277A
Document #: 38-07332 Rev. *A
Page 5 of 19
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Supply Voltage ..................................................–0.5 to +7.0V
Input Voltage ............................................ –0.5V to VDD + 0.5
Storage Temperature (Non-Condensing) .... –65
°C to +150°C
Junction Temperature ............................................... +150
°C
Package Power Dissipation.............................................. 1W
Static Discharge Voltage............................................ >2000V
(per MIL-STD-883, Method 3015, like VDD pins tied together)
Byte 1: CPU, 24/48 MHz Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
23
48/24 MHz (Active/Inactive)
Bit 6
22
48/24 MHz (Active/Inactive)
Bit 5
--
(Reserved) drive to ‘0’
Bit 4
N/A
Not Used, drive 0
Bit 3
38
CPUCLK3 (Active/Inactive)
Bit 2
39
CPUCLK2 (Active/Inactive)
Bit 1
41
CPUCLK1 (Active/Inactive)
Bit 0
42
CPUCLK0 (Active/Inactive)
Byte 3: SDRAM Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
26
SDRAM7 (Active/Inactive)
Bit 6
27
SDRAM6 (Active/Inactive)
Bit 5
29
SDRAM5 (Active/Inactive)
Bit 4
30
SDRAM4 (Active/Inactive)
Bit 3
32
SDRAM3 (Active/Inactive)
Bit 2
33
SDRAM2 (Active/Inactive)
Bit 1
35
SDRAM1 (Active/Inactive)
Bit 0
36
SDRAM0 (Active/Inactive)
Byte 5: Peripheral Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
--
(Reserved) drive to ‘0’
Bit 6
--
(Reserved) drive to ‘0’
Bit 5
--
(Reserved) drive to ‘0’
Bit 4
45
IOAPIC (Active/Inactive)
Bit 3
--
(Reserved) drive to ‘0’
Bit 2
--
(Reserved) drive to ‘0’
Bit 1
1
REF1 (Active/Inactive)
Bit 0
2
REF0 (Active/Inactive)
Byte 2: PCI Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
--
(Reserved) drive to ‘0’
Bit 6
8
PCICLK_F (Active/Inactive)
Bit 5
16
PCICLK5 (Active/Inactive)
Bit 4
14
PCICLK4 (Active/Inactive)
Bit 3
13
PCICLK3 (Active/Inactive)
Bit 2
12
PCICLK2 (Active/Inactive)
Bit 1
11
PCICLK1 (Active/Inactive)
Bit 0
9
PCICLK0 (Active/Inactive)
Byte 4: SDRAM Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
N/A
Not used, drive to ‘0’
Bit 6
N/A
Not used, drive to ‘0’
Bit 5
N/A
Not used, drive to ‘0’
Bit 4
N/A
Not used, drive to ‘0’
Bit 3
N/A
Not used, drive to ‘0’
Bit 2
N/A
Not used, drive to ‘0’
Bit 1
N/A
Not used, drive to ‘0’
Bit 0
N/A
Not used, drive to ‘0’
Byte 6: Reserved, for future use
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