 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HN29V25611AT-50H Datasheet(PDF) 9 Page - Renesas Technology Corp |
|
||||||||||||||||||||||||||||||
HN29V25611AT-50H Datasheet(HTML) 9 Page - Renesas Technology Corp |
|
|
9 / 47 page  HN29V25611AT-50H 7 Pin Function CE: CE is used to select the device. The status returns to the standby at the rising edge of CE in the reading operation. However, the status does not return to the standby at the rising edge of CE in the busy state in programming and erase operation. OE: Memory data and status register data can be read, when OE is V IL. WE: Commands and address are latched at the rising edge of WE. SC: Programming and reading data is latched at the rising edge of SC. RES: RES pin must be kept at the V ILR (V SS ± 0.2 V) level when VCC is turned on and off. In this way, data in the memory is protected against unintentional erase and programming. RES must be kept at the V IHR (VCC ± 0.2 V) level during any operations such as programming, erase and read. CDE: Commands and data are latched when CDE is V IL and address is latched when CDE is VIH. RDY/ Busy: The RDY/Busy indicates the program/erase status of the flash memory. The RDY/Busy signal is initially at a high impedance state. It turns to a V OL level after the (40H) command in programming operation or the (B0H) command in erase operation. After the erase or programming operation finishes, the RDY/ Busy signal turns back to the high impedance state. I/O0 to I/O7: The I/O pins are used to input data, address and command, and are used to output memory data and status register data. Mode Selection Mode CE OE WE SC RES CDE RDY/Busy* 3 I/O0 to I/O7 Deep standby ×*4 ××× V ILR × V OH High-Z Standby V IH ××× V IHR × V OH High-Z Output disable V IL V IH V IH × V IHR × V OH High-Z Status register read* 1 V IL V IL V IH × V IHR × V OH Status register outputs Command write* 2 V IL V IH V IL V IL V IHR V IL V OH Din Notes: 1. Default mode after the power on is the status register read mode (refer to status transition). From I/O0 to I/O7 pins output the status, when CE = V IL and OE = VIL (conventional read operation condition). 2. Refer to the command definition. Data can be read, programmed and erased after commands are written in this mode. 3. The RDY/ Busy bus should be pulled up to V CC to maintain the VOH level while the RDY/Busy pin outputs a high impedance. 4. An × means “Don’t care”. The pin level can be set to either V IL or VIH referred to DC characteristics. |
Similar Part No. - HN29V25611AT-50H |
|
Similar Description - HN29V25611AT-50H |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
