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IDT72V261LA20PF Datasheet(PDF) 1 Page - Integrated Device Technology

Part # IDT72V261LA20PF
Description  3.3 VOLT CMOS SuperSync FIFO
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72V261LA20PF Datasheet(HTML) 1 Page - Integrated Device Technology

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DSC-4673/2
 2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SuperSync is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
APRIL 2002
3.3 VOLT CMOS SuperSync FIFO™
16,384 x 9
32,768 x 9
IDT72V261LA
IDT72V271LA
FEATURES:
••••• Choose among the following memory organizations:
IDT72V261LA
16,384 x 9
IDT72V271LA
32,768 x 9
••••• Pin-compatible with the IDT72V281/72V291 and IDT72V2101/
72V2111SuperSync FIFOs
••••• Functionally compatible with the 5 Volt IDT72261/72271 family
••••• 10ns read/write cycle time (6.5ns access time)
••••• Fixed, low first word data latency time
••••• 5V input tolerant
••••• Auto power down minimizes standby power consumption
••••• Master Reset clears entire FIFO
••••• Partial Reset clears data, but retains programmable settings
••••• Retransmit operation with fixed, low first word data
latency time
••••• Empty, Full and Half-Full flags signal FIFO status
••••• Programmable Almost-Empty and Almost-Full flags, each flag
can default to one of two preselected offsets
••••• Program partial flags by either serial or parallel means
••••• Select IDT Standard timing (using EF and FF flags) or First
Word Fall Through timing (using
OR and IR flags)
••••• Output enable puts data outputs into high impedance state
••••• Easily expandable in depth and width
••••• Independent Read and Write clocks (permit reading and writing
simultaneously)
••••• Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-
pin Slim Thin Quad Flat Pack (STQFP)
••••• High-performance submicron CMOS technology
••••• Industrial temperature range (–40
°°°°°C to +85°°°°°C) is available
DESCRIPTION:
The IDT72V261LA/72V271LA are functionally compatible versions of
the IDT72261/72271 designed to run off a 3.3V supply for very low power
consumption. The IDT72V261LA/72V271LA are exceptionally deep, high
speed, CMOS First-In-First-Out (FIFO) memories with clocked read and
INPUT REGISTER
OUTPUT REGISTER
RAM ARRAY
16,384 x 9
32,768 x 9
FLAG
LOGIC
FF/IR
PAF
EF/OR
PAE
HF
READ POINTER
READ
CONTROL
LOGIC
WRITE CONTROL
LOGIC
WRITE POINTER
RESET
LOGIC
WEN
WCLK
D0 -D8
LD
MRS
REN
RCLK
OE
Q0 -Q8
OFFSET REGISTER
PRS
FWFT/SI
SEN
RT
4673 drw 01
FUNCTIONAL BLOCK DIAGRAM


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