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MR18R16248EG0 Datasheet(PDF) 9 Page - Samsung semiconductor |
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MR18R16248EG0 Datasheet(HTML) 9 Page - Samsung semiconductor |
9 / 16 page Page 8 MR16R1624(8/G)EG0 MR18R1624(8/G)EG0 Version 1.0 May 2004 AC Electrical Specifications Adjusted ∆T PD Specification Table 8: AC Electrical Specifications Symbol Parameter and Conditions Min Typ Max Unit ZL Module Impedance of RSL Signals 25.2 28 30.8 Ω ZUL-CMOS Module Impedance of SCK and CMOS signals 23.8 28 32.2 Ω TPD Propagation Delay variation of RSL signals. Average clock delay from finger to finger of all RSL clock nets (CTM, CTMN, CFM, and CFMN) - See Table10a,b ns ∆T PD Propagation delay variation of RSL signals with respect to TPD b,c for 4 and 8 device modules -21 21 ps Propagation delay variation of RSL signals with respect to TPD b,c for 16 device modules -24 24 ps ∆T PD-CMOS Propagation delay variation of SCK signals with respect to an average clock delay -250 250 ps ∆T PD-SCK,CMD Propagation delay variation of CMD signals with respect to SCK signal -200 200 ps Vα/VIN Attenuation Limit See Table10a % VXF/VIN Forward crosstalk coefficient (300ps input rise time @ 20%-80%) See Table10a % VXB/VIN Backward crosstalk coefficient (300ps input rise time @ 20%- 80%) See Table10a % a. Table 10 lists parameters and specifications for different storage capacity RIMM Modules that use 256Mb or 288Mb RDRAM devices. b. TPD or Average clock delay is defined as the delay from finger to finger of RSL signal. c. If the RIMM module meets the following specification, then it is compliant to the specification. If the RIMM module does not meet these specifica tions, then the specification can be adjusted by the “Adjusted ∆T PD Specification“ table 9 below. Table 9: Adjusted ∆T PD Specification Symbol Parameter and Conditions Adjusted Min/Max Absolute Min / Max Unit ∆T PD Propagation delay variation of RSL signals with respect to TPD for 4 and 8 device modules +/-[20+(18*N* ∆Z0)]a -30 30 ps Propagation delay variation of RSL signals with respect to TPD for 16 device modules +/-[24+(18*N* ∆Z0)]a -50 50 ps a. Where: N = Number of RDRAM devices installed on the RIMM module ∆Z0 = delta Z0% = (max Z0 - min Z0)/(min Z0) (max Z0 and min Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers on the modules) |
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