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VSC8121 Datasheet(PDF) 5 Page - Vitesse Semiconductor Corporation |
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VSC8121 Datasheet(HTML) 5 Page - Vitesse Semiconductor Corporation |
5 / 18 page VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC8121 2.488GHz SONET/SDH Clock Generator G52163-0, Rev 4.2 Page 5 04/16/01 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com Internet: www.vitesse.com AC Characteristics Table 2: AC Characteristics NOTE: (1) ppm refers to “parts per million.” 100ppm (100/1000000) is equivalent to 0.01%. Therefore, the equivalent reference clock frequency range in MHz for +/-100ppm tolerance is as follows: Note that +/-100ppm tolerance for reference clock frequency more than accommodates the SONET/SDH requirement that refer- ence clock-supplying crystals function at +/-20ppm.) Figure 5: RMS/Peak-to-Peak Jitter (12kHz - 20MHz), REF_CLK freq = 77.76MHz Parameter Description Min Typ Max Units Conditions TCLK High-speed output clock period — 401.9 — ps RCd Reference clock duty cycle 45 — 55 % RCf Reference clock frequency (selectable) — 51.84, 77.76, or 155.52 — MHz ∆f RC Reference clock frequency tolerance -100 — +100 ppm (1) tjitter Jitter generation — 1.75 3.6 ps RMS 12kHz to 20MHz. See Figure 5. RCf X 100ppm = Acceptable Range 51.84MHz 5.184KHz 51.83MHz to 51.85MHz 77.76MHz 7.776KHz 77.75MHz to 77.78MHz 155.52MHz 15.552KHz 155.51MHz to 155.54MHz 0 20 40 60 80 100 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Case Temperature (deg C) 0 20 40 60 80 100 25 20 15 10 5 0 Case Temperature (deg C) RMS Jitter Pk-Pk Jitter |
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