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XRT7295ATIW Datasheet(PDF) 11 Page - Exar Corporation |
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XRT7295ATIW Datasheet(HTML) 11 Page - Exar Corporation |
11 / 18 page XRT7295AT 11 Rev.1.20 JITTER ACCOMMODATION Under all allowable operating conditions, the jitter accommodation of the XRT7295AT device exceeds all system requirements for error-free operation (BER<1E-9). The typical (VDD = 5V, T = 25°C, DSX-3 nominal signal level) jitter accommodation for the XRT7295AT is shown in Figure 10. FALSE-LOCK IMMUNITY False-lock is defined as the condition where a PLL recovered clock obtains stable phase-lock at a frequency not equal to the incoming data rate. The XRT7295AT device uses a combination frequency/phase-lock architecture to prevent false-lock. An on-chip frequency comparator continuously compares the EXCLK reference to the PLL clock. If the frequency difference between the EXCLK and PLL clock exceeds approximately ±0.5%, correction circuitry forces re-acquisition of the proper frequency and phase. ACQUISITION TIME If a valid input signal is assumed to be already present at RIN, the maximum time between the application of device power and error-free operation is 20ms. If power has already been applied, the interval between the application of valid data (or the action of valid data following a loss of signal) and error-free operation is 4ms. LOSS-OF-LOCK DETECTION As stated above, the PLL acquisition aid circuitry monitors the PLL clock frequency relative to the EXCLK frequency. The RLOL alarm is activated if the difference between the PLL clock and the EXCLK frequency exceeds approximately ±0.5%. This will not occur until at least 250 bit periods after loss of input data. Figure 9. Typical PLL Jitter Transfer Characteristic 1 0 -5 -4 -3 -2 -1 100 500 1K 5K 10K 50K100K 500K PEAK = 0.05dB f3dB = 205kHz Frequency (Hz) 1 10 100 1K 10K 100K 1000K 40 10 1.0 0.1 XRT7295AT Typical PUB 54014 G.824 TR-TSY-000499 Category 1 TR-TSY-000499 Category 2 5k 10 10k 5 60k 1 300k 0.5 1M 0.4 XRT7295AT Typical Sinewave Jitter Frequency (Hz) Figure 10. Input Jitter Tolerance at DSX-3 Level Jitter Frequency (Hz) Jitter Amplitude (U.I.) |
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