LTC4300A-3

9

sn4300a3 4300a3fs

Resistor Pull-Up Value Selection

The system pull-up resistors must be strong enough to

provide a positive slew rate of 1.25V/µs on the SDA and

SCL pins, in order to activate the boost pull-up currents

during rising edges. Choose maximum resistor value R

using the formula:

capacitance in picofarads (pF).

In addition, regardless of the bus capacitance, always

high voltages on SDAOUT and SCLOUT to connect the

backplane to the card, and these pull-up values are needed

to overcome the precharge voltage.

APPLICATIO S I FOR ATIO

Live Insertion and Capacitance Buffering Application

Figures 3 and 4 illustrate the usage of the LTC4300A-3 in

applications that take advantage of both its Hot Swap con-

trolling and capacitance buffering features. In all of these

applications, note that if the I/O cards were plugged di-

rectly into the backplane, all of the backplane and card ca-

pacitances would add directly together, making rise- and

fall-time requirements difficult to meet. Placing a

LTC4300A-3 on the edge of each card, however, isolates

the card capacitance from the backplane. For a given I/O

card, the LTC4300A-3 drives the capacitance of everything

on the card and the backplane must drive only the capaci-

tance of the LTC4300A-3, which is less than 10pF.

SDAIN

SCLIN

GND

SDAOUT

SCLOUT

ENABLE

4300A-3 F03

R2

10k

R3

10k

R1

10k

R4

10k

R5

10k

R6

10k

I/O PERIPHERAL CARD 1

LTC4300A-3

C2 0.01µF

CARD_SCL

CARD_SDA

R7

10k

R8

10k

BACKPLANE

BACKPLANE

CONNECTOR

SDA

SCL

ENA2

ENA1

C1

0.01µF

SDAIN

SCLIN

GND

SDAOUT

SCLOUT

ENABLE

I/O PERIPHERAL CARD 2

LTC4300A-3

C4 0.01µF

CARD2_SCL

CARD2_SDA

C3

0.01µF

Figure 3. The LTC4300A-3 in a PCI Application Where All the Pins Have the Same Length.

ENABLE Should be Held Low Until All Transients Associated with the Live Insertion Have Settled