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LTC4300A-3IDD Datasheet(PDF) 3 Page - Linear Technology

Part # LTC4300A-3IDD
Description  Level Shifting Hot Swappable 2-Wire Bus Buffer with Enable
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4300A-3IDD Datasheet(HTML) 3 Page - Linear Technology

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LTC4300A-3
3
sn4300a3 4300a3fs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: IPULLUPAC varies with temperature and VCC voltage, as shown in
the Typical Performance Characteristics section.
Note 3: The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pullup resistor and VCC voltage is shown in the Typical Performance
Characteristics section.
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating
temperature range, otherwise specfications are at TA = 25°C. VCC = 2.7V to 5.5V, VCC2 = 2.7V to 5.5V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Note 4: Guaranteed by design, not subject to test.
Note 5: CB = total capacitance of one bus line in pF.
Rise-Time Accelerators
IPULLUPAC Transient Boosted Pull-Up Current
Positive Transition on SDA, SCL, VCC = 2.7V,
1
2
mA
VCC2 = 2.7V, Slew Rate = 1.25V/µs (Note 2)
Input-Output Connection
VOS
Input-Output Offset Voltage
10k to VCC on SDA, SCL, VCC = 3.3V (Note 3),
0
100
175
mV
VCC2 = 3.3V, VIN = 0.2V
fSCL, SDA Operating Frequency
Guaranteed by Design, Not Subject to Test
0
400
kHz
CIN
Digital Input Capacitance
Guaranteed by Design, Not Subject to Test
10
pF
VOL
Output Low Voltage, Input = 0V
SDA, SCL Pins, ISINK = 3mA, VCC = 2.7V,
0
0.4
V
VCC2 = 2.7V
ILEAK
Input Leakage Current
SDA, SCL Pins = VCC = 5.5V, VCC2 = 5.5V
±5
µA
Timing Characteristics
fI2C
I2C Operating Frequency
(Note 4)
0
400
kHz
tBUF
Bus Free Time Between Stop
(Note 4)
1.3
µs
and Start Condition
thD,STA
Hold Time After (Repeated)
(Note 4)
0.6
µs
Start Condition
tsu,STA
Repeated Start Condition Setup Time
(Note 4)
0.6
µs
tsu,STO
Stop Condition Setup Time
(Note 4)
0.6
µs
thD, DAT
Data Hold Time
(Note 4)
300
ns
tsu, DAT
Data Setup Time
(Note 4)
100
ns
tLOW
Clock Low Period
(Note 4)
1.3
µs
tHIGH
Clock High Period
(Note 4)
0.6
µs
tf
Clock, Data Fall Time
(Notes 4, 5)
20 + 0.1 • CB
300
ns
tr
Clock, Data Rise Time
(Notes 4, 5)
20 + 0.1 • CB
300
ns


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