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S29PL127J65 Datasheet(PDF) 4 Page - SPANSION |
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4 / 106 page 2 S29PL127J/S29PL129J/S29PL064J/S29PL032J 31107A62 April 7, 2005 PRE L IMINA R Y HARDWARE FEATURES Ready/Busy# pin (RY/BY#) — Provides a hardware method of detecting program or erase cycle completion Hardware reset pin (RESET#) — Hardware method to reset the device to reading array data WP#/ ACC (Write Protect/Acceleration) input —At VIL, hardware level protection for the first and last two 4K word sectors. —At VIH, allows removal of sector protection —At VHH, provides accelerated programming in a factory setting Persistent Sector Protection — A command sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector — Sectors can be locked and unlocked in-system at VCC level Password Sector Protection — A sophisticated sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector using a user-defined 64-bit password Package options — Standard discrete pinouts 11 x 8 mm, 80-ball Fine-pitch BGA (PL127J/PL129J (VBG080) 8.15 x 6.15 mm, 48-ball Fine pitch BGA (PL064J/PL032J) (VBK048) —MCP-compatible pinout 8 x 11.6 mm, 64-ball Fine-pitch BGA (PL127J and PL129J) 7 x 9 mm, 56-ball Fine-pitch BGA (PL064J and PL032J) Compatible with MCP pinout, allowing easy integration of RAM into existing designs — 20 x 14 mm, 56-pin TSOP (PL127J) (TS056) |
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