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X24257V14-2.5 Datasheet(PDF) 9 Page - Xicor Inc. |
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X24257V14-2.5 Datasheet(HTML) 9 Page - Xicor Inc. |
9 / 19 page X24257 – Preliminary Information Characteristics subject to change without notice. 9 of 19 REV 1.1.1 10/15/00 www.xicor.com the WEL bit and zeros to the other bits of the control register) or until the part powers up again. Writes to WEL bit do not cause a high voltage write cycle, so the device is ready for the next operation immediately after the stop condition. BP2, BP1, BP0: Block Protect Bits (Nonvolatile) The Block Protect Bits, BP2, BP1 and BP0, determine which blocks of the array are write protected. A write to a protected block of memory is ignored. The block pro- tect bits will prevent write operations to one of eight segments of the array. The partitions are described in Table 2. Table 2. Block Protect Bits Figure 11. Block Protection Configuration BP2 BP1 BP0 Protected Addresses Array Lock 00 0 None None 00 1 6000h - 7FFFh (8K bytes) Upper 1/4 (Q4) 01 0 4000h - 7FFFh (16K bytes) Upper 1/2 (Q3, Q4) 01 1 0000h - 7FFFh (32K bytes) Full Array (All) 10 0 0000h - 003Fh (64 bytes) First Page (P1) 10 1 0000h - 007Fh (128 bytes) First 2 pgs (P2) 11 0 0000h - 00FFh (256 bytes) First 4 pgs (P4) 11 1 0000h - 01FFh (512 bytes) First 8 pgs (P8) BP2– BP0 000 001 010 011 100 101 110 111 |
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