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HDSP-2500 Datasheet(PDF) 9 Page - Agilent(Hewlett-Packard) |
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HDSP-2500 Datasheet(HTML) 9 Page - Agilent(Hewlett-Packard) |
9 / 16 page 9 Electrical Description Pin Function Description RESET (RST, pin 1) Initializes the display. FLASH (FL, pin 2) FL low indicates an access to the Flash RAM and is unaffected by the state of address lines A3-A4. ADDRESS INPUTS Each location in memory has a distinct address. Address inputs (A0-A2) (A0-A4, pins 3-6, 10) select a specific location in the Character RAM, the Flash RAM or a particular row in the UDC (User-Defined Character) RAM. A3-A4 are used to select which section of memory is accessed. Table 1 shows the logic levels needed to access each section of memory. Table 1. Logic Levels to Access Memory Section of Memory FL A4 A3 A2 A1 A0 Flash RAM 0 X X Char. Address UDC Address Register 1 0 0 Don't Care UDC RAM 1 0 1 Row Address Control Word Register 1 1 0 Don’t Care Character RAM 1 1 1 Character Address CLOCK SELECT Used to select either an internal (CLS = 1) or external (CLS = 0) clock source. (CLS, pin 11) CLOCK INPUT/OUTPUT Outputs the master clock (CLS = 1) or inputs a clock (CLS = 0) for slave (CLK, pin 12) displays. WRITE (WR, pin 13) Data is written into the display when the WR input is low and the CE input is low. CHIP ENABLE (CE, pin 17) Must be at a logic low to read or write data to the display and must go high between each read and write cycle. READ (RD, pin 18) Data is read from the display when the RD input is low and the CE input is low. DATA Bus (D0-D7, Used to read from or write to the display. pins 19, 20, 23-28) GND (SUPPLY) (pin 15) Analog ground for the LED drivers. GND (LOGIC) (pin 16) Digital ground for internal logic. VDD (POWER) (pin 14) Positive power supply input. |
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Similar Description - HDSP-2500 |
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