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HDSP-2503 Datasheet(PDF) 6 Page - Agilent(Hewlett-Packard) |
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HDSP-2503 Datasheet(HTML) 6 Page - Agilent(Hewlett-Packard) |
6 / 16 page 6 Optical Characteristics at 25 °C VDD = 5.0 V at Full Brightness Luminous Intensity Peak Dominant Character Average (#) Wavelength Wavelength Part Iv (mcd) λ Peak λ d Description Number Min. Typ. (nm) (nm) AlGaAs HDSP-2107 5.0 15.0 645 637 -2504 HER HDSP-2112 2.5 7.5 635 626 -2502 Orange HDSP-2110 2.5 7.5 600 602 -2500 Yellow HDSP-2111 2.5 7.5 583 585 -2501 High HDSP-2113 2.5 7.5 568 574 Performance -2503 Green Note: 1. Refers to the initial case temperature of the device immediately prior to measurement. [1] AC Timing Characteristics Over Temperature Range (-45 °C to +85°C) 4.5 V < V DD < 5.5 V, unless otherwise specified Reference Number Symbol Description Min.[1] Units 1t ACC Display Access Time Write 210 Read 230 ns 2t ACS Address Setup Time to Chip Enable 10 ns 3t CE Chip Enable Active Time[2,3] Write 140 Read 160 ns 4t ACH Address Hold Time to Chip Enable 20 ns 5t CER Chip Enable Recovery Time 60 ns 6t CES Chip Enable Active Prior to Rising Edge of [2,3] Write 140 Read 160 ns 7t CEH Chip Enable Hold Time to Rising Edge of Read/Write Signal[2,3] 0ns 8t W Write Active Time 100 ns 9t WSU Data Write Setup Time 50 ns 10 t WH Data Write Hold Time 20 ns 11 t R Chip Enable Active Prior to Valid Data 160 ns 12 t RD Read Active Prior to Valid Data 75 ns 13 t DF Read Data Float Delay 10 ns t RC Reset Active Time[4] 300 ns Notes: 1. Worst case values occur at an IC junction temperature of 150 ° C. 2. For designers who do not need to read from the display, the Read line can be tied to V DD and the Write and Chip Enable lines can be tied together. 3. Changing the logic levels of the Address lines when CE = “0” may cause erroneous data to be entered into the Character RAM, regardless of the logic levels of the WR and RD lines. 4. The display must not be accessed until after 3 clock pulses (110 µs min. using the internal refresh clock) after the rising edge of the reset line. |
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