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LTC1598IG Datasheet(PDF) 6 Page - Linear Technology |
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LTC1598IG Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page 6 LTC1598 APPLICATIONS INFORMATION INPUT DATA WORD The LTC1598 uses its Chip Select and DIN pins to select one of its eight channels as shown in the operating sequence figures and Table 1. For this discussion we will assume that CS MUX and CS ADC are tied together and will refer to them as simply, CS. When CS is high, the input data on the DIN pin is latched into the 4-bit shift register on the rising edge of the clock. The input data word consists of an “EN” bit and a string of three bits for channel selection. If the “EN” bit is logic high as illustrated in Operating Sequence 1, it enables the selected channel. To ensure correct operation, the CS must be pulled low before the next rising edge of the clock. More than four input bits can be sent to the ADC without problems. The channel will be determined by the last four bits clocked in before CS falls. Once the CS is pulled low, all channels are simulta- neously switched off to ensure a break-before-make interval. After a delay of tON, the selected channel is switched on, allowing signal transmission. The selected channel remains on, until the next falling edge of CS. After a delay of tOFF, it terminates the analog signal transmis- sion and switches to the next selected channel. If the “EN” bit is logic low, as illustrated in Operating Sequence 2, it disables all channels. Table 1 shows the various bit combinations for channel selection. Table 1. Logic Table for Channel Selection CHANNEL STATUS EN D2 D1 DO All Off 0 X X X CH0 1 0 0 0 CH1 1 0 0 1 CH2 1 0 1 0 CH3 1 0 1 1 CH4 1 1 0 0 CH5 1 1 0 1 CH6 1 1 1 0 CH7 1 1 1 1 ANALOG CONSIDERATIONS Grounding The LTC1598 should be used with an analog ground plane and single-point grounding techniques. To achieve the optimum performance use a printed circuit board. The Ground pins (Pins 4 and 9) should be tied directly to the ground plane with minimum lead length. Bypassing For good performance, the LTC1598 VCC and VREF pins must be free of noise and ripple. Any changes in the VCC and VREF voltages with respect to ground during the conversion cycle can induce errors or noise in the output code. Bypass the VCC and VREF pins directly to the analog ground plane with minimum of 0.1 µF capacitors and lead lengths as short as possible. Analog Inputs Because of the capacitive redistribution A/D conversion techniques used, the analog inputs of the LTC1598 have capacitive switching input current spikes. These current spikes settle quickly and do not cause a problem. But if large source resistances are used, or if slow settling op amps drive the inputs, take care to ensure the transients caused by the current spikes settle completely before the conversion begins. |
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