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LX1672-05CPW Datasheet(PDF) 10 Page - Microsemi Corporation |
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LX1672-05CPW Datasheet(HTML) 10 Page - Microsemi Corporation |
10 / 20 page Microsemi Linfinity Microelectronics Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 10 Copyright © 2000 Rev. 0.3m, 2005-04-12 LX1672 Multiple Output LoadSHARE™ PWM PRELIMINARY DATA SHEET TM ® TH EORY OF O PERAT ION GENERAL DESCRIPTION The LX1672 is a voltage-mode pulse-width modulation controller integrated circuit. The internal ramp generator frequency is fixed to 300kHz. The device has external compensation, for more flexibility of output current magnitude. UNDER VOLTAGE LOCKOUT (UVLO) At power up, the LX1672 monitors the supply voltage for VCC, VCCL, and VCX (there is no requirement for sequencing the supplies). Before all supplies reach their under-voltage lock- out (UVLO) thresholds, the soft-start (SS) pin is held low to prevent soft-start from beginning, the oscillator is disabled and all MOSFETs are held off. There is an internal delay that will filter out transients less that 1.5uSec. SOFT-START Once the supplies are above the UVLO threshold, the soft-start capacitor begins to be charged by the reference through a 20kΩ internal resistor. The capacitor voltage at the SS pin rises as a simple RC circuit. The SS pin is connected to the error amplifier’s non-inverting input that controls the output voltage. The output voltage will follow the SS pin voltage if sufficient charging current is provided to the output capacitor. The simple RC soft-start allows the output to rise faster at the beginning and slower at the end of the soft-start interval. Thus, the required charging current into the output capacitor is less at the end of the soft-start interval. A comparator monitors the SS pin voltage and indicates the end of soft-start when SS pin voltage reaches 95% of VREF. OVER-CURRENT PROTECTION (OCP) AND HICCUP The LX1672 uses the RDS(ON) of the upper MOSFET, together with a resistor (RSET) to set the actual current limit point. The current sense comparator senses the MOSFET current 350nS after the top MOSFET is switched on in order to reduce inaccuracies due to ringing. A current source supplies a current (ISET), whose magnitude is 50µA. The set resistor RSET is selected to set the current limit for the application. RSET and VSX should be connected directly at the upper MOSFET drain and source to get an accurate measurement across the low resistance RDS(ON). When the sensed voltage across RDS(ON) plus the set resistor exceeds the 300mV, VTRIP threshold, the OCP comparator outputs a signal to reset the PWM latch and to start hiccup mode. The soft-start capacitor (CSS) is discharged slowly (10 times slower than when being charged up by RSS). When the voltage on the SS pin reaches a 0.1V threshold, hiccup finishes and the circuit soft- starts again. During hiccup both MOSFETs for that phase are held off. Hiccup is disabled during the soft-start interval, allowing start up with maximum current. If the rate of rise of the output voltage is too fast, the required charging current to the output capacitor may be higher than the limit-current. In this case, the peak MOSFET current is regulated to the limit-current by the current- sense comparator. If the MOSFET current still reaches its limit after the soft-start finishes, the hiccup is triggered again. When the output has a short circuit the hiccup circuit ensures that the average heat generation in both MOSFETs and the average current is much less than in normal operation,. Over-current protection can also be implemented using a sense resistor, instead of using the RDS(ON) of the upper MOSFET, for greater set-point accuracy. OSCILLATOR FREQUENCY An internal oscillator sets the PWM switching frequency at 300KHz, 500KHz or 600KHz. THEORY OF OPERATION FOR A BI-PHASE, LOADSHARE CONFIGURATION The basic principle used in LoadSHARING, in a multiple phase buck converter topology is that if multiple, identical, inductors have the same identical voltage impressed across their leads, they must then have the same identical current passing through them. The current that we would like to balance between inductors is mainly the DC component along with as much as possible the transient current. All inductors in a multiphase buck converter topology have their output side tied together at the output filter capacitors. Therefore this side of all the inductors have the same identical voltage. If the input side of the inductors can be forced to have the same equivalent DC potential on this lead, then they will have the same DC current flowing. To achieve this requirement, phase 1 will be the control phase that sets the output operating voltage, under normal PWM operation. To force the current of phase 2 to be equal to the current of phase 1, a second feedback loop is used. Phase 2 has a low pass filter connected from the input side of each inductor. This side of the inductors has a square wave signal that is proportional to its duty cycle. The output of each LPF is a DC (+ some AC) signal that is proportional to the magnitude and duty cycle of its respective inductor signal. The second feedback loop will use the output of the phase 1 LPF as a reference signal for an error amplifier that will compare this reference to the output of the phase 2 LPF. This error signal will be amplified and used to control the PWM circuit of phase 2. Therefore, the duty cycle of phase 2 will be set so that the equivalent voltage potential will be forced across the phase 2 inductor as compared to the phase 1 inductor. This will force the current in the phase 2 inductor to follow and be equal to the current in the phase 1 inductor. There are four methods that can be used to implement the LoadSHARE feature of the LX1672 in the Bi-Phase mode of operation. |
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