Data Sheet and Application Notes NKM2401 Code/decoder chip

Part number 1-982

NKM2401 Issue 1.1 Nov-98

©

© Milford Instruments/nikam electronics www.milinst.demon.co.uk

Page 8 of 15

Receive Mode Operation

In receive mode the NKM2401 is continually listening for messages and searching the digital ‘white

noise’ on the receiver data output for the preamble followed by the unique synchronising character. If

it finds this character it “locks on” to the signal, decodes it and stores the data in a local buffer. The

CRC is calculated on the received data and if correct the ‘Data Ready Output’ line is set low.

Handshake Methods

One Wire Interface. (Beginners) This is the simplest method. The ‘Send Data’ line is permanently wired

high. Whenever the buffer is full (signalled by the ‘Data Ready’ line going low) it is immediately sent out

on the ‘Serial Data’ line. The host must therefore always be “ready and waiting” for this data.

Three Wire Interface. This full handshaking method allows complete flow control by the host at the

expense of using two extra I/O lines. The host monitors the ‘Data Ready’ line (by polling or interrupt)

until the NKM2401 signals that it has data in its buffer by setting the ‘Data Ready’ line low. When the

host is ready to receive data, it must set the ‘Send Data’ line high. After a 1mS delay (to allow settling)

the serial data is sent. After each character is sent there is a further 1mS delay and the ‘Send Data’

line is tested again. If it is still high another character is sent, if it is low no more characters are sent.

This allows the host to unload the buffer a character at a time, process the data (at its own pace) and

then collect another character. The ‘Data Ready’ line will only go high again when the buffer is empty.

The only disadvantage to this method is that the NKM2401 cannot receive any more new messages until

the buffer is empty.

Two Wire Interface. (Advanced) This is a refinement of the above method and saves one I/O line by

using a configurable bi-directional port in the host.. The ‘Data Ready’ output is connected to the ‘Send

Data’ input by a 10k resistor. The host I/O line is initially set up as an input and it is normally pulled up

to Vcc (+5V) via the 10k resistor from the ‘Data Ready’ line. When the buffer is full the ‘Data Ready’

line goes low as above. The host should detect this state, configure the I/O line as an output and set it

high when it is ready to receive the serial data. The series resistor allows the ‘Send Data’ input to be

set high overriding the ‘Data Ready’ low output. When the serial data has been sent (buffer empty) the

‘Data Ready’ line returns high awaiting the next packet.

Status

Data Ready Output

Serial Data Output

Send Data Input

No data available

High

Low

Set Low

Data ready

o

Goes Low

Low

Low

Send data

Low

Low

r

Pull High

Sending data

Low

Serial Data

r

Keep High

Done

r

Goes High

Low

Set Low

Notes

1. The Data Ready line can drive an optional LED which indicates when the buffer has valid data

available. This is a useful diagnostic tool.

2. The Send Data input is tested after the transmission of each character and therefore must be held

high for the total duration of transmission (Eight characters)

3. The error checking (CRC) ensures (with 99.9% certainty) that any message received and flagged by

Data Ready will be error free. However if the CRC fails for any reason the message is lost forever.

In simplex (one way only) systems such as these it may therefore be prudent to send the message

multiple times.