1

PS8469

05/03/00

PI6C185-02B

Precision 1-7 Clock Buffer

Pin Configuration

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

Block Diagram

Features

• High speed: 140 MHz

• Low noise non-inverting 1-7 buffer

• Supports up to three SDRAM DIMMs

• Low skew (<250ps) between any two output clocks

• 3.3V power supply voltage

• 16-pin TSSOP (L) and QSOP (Q) packages

Description

The PI6C185-02B, a high-speed low-noise 1-7 non-inverting

buffer, is designed for SDRAM clock buffer applications. It is

intended to be used with the PI6C10X clock generator for Intel

Architecture-based Mobile systems.

At power up, all SDRAM outputs are enabled and active. The I2C

Serial control may be used to individually activate/deactivate any

of the seven output drivers.

Note:

Purchase of I2C components from Pericom conveys a license to

use them in an I2C system as defined by Philips.

SDRAM6

SDRAM2

SDRAM1

SDRAM0

BUF_IN

SDATA

SCLOCK

SDRAM3

I2C

I/O

1

2

3

Vss

4

BUF_IN

5

SDRAM1

6

Vdd

7

SCLK

8

SDRAM2

SDRAM6

Vss

Vdd

SDRAM3

Vss

SDATA

16

15

14

13

12

11

10

9

Vdd

SDRAM0

SDRAM4

SDRAM5

16-Pin

L,Q