Phison Electronics Corporation

2F, RiteKom Building, No.669, Sec 4, Chung Hsing Road, Chutung, Hsinchu, Taiwan 310,

R.O.C.

Tel：+886-3-583-3899

Fax：+886-3-583-3666

Page 8

DCC.: S-05007

F2. Pin Description of Power Setting Diagram ( flash voltage 1.7V ~ 1.95V )

F3. Pins Listed in Numeric Order & Pin Description：

BALL No.

BALL Name

Dir.

Description

A1

NC

-

No Connect

B1

FAD_PAD[5]

I/O

Flash IO

C1

FAD_PAD[6]

I/O

Flash IO

D1

AGAND_RST

O

AGAND flash reset

E1

FARDB_PAD

O

Flash read enable

F1

FCEB_PAD[2]

O

Flash chip enable

G1

FACLE_PAD

O

Flash command latch enable

H1

NC

-

No Connect

J1

GND

I

Ground

K1

VCCK(1.8V)

I

Power

L1

CLK_PAD

I

Clock

M1

DAT0_PAD

I/O

Data

N1

DAT7_PAD

I/O

Data

A2

FBD_PAD[7]

I/O

Flash IO

B2

FBD_PAD[6]

I/O

Flash IO

C2

FAD_PAD[4]

I/O

Flash IO

D2

FAD_PAD[7]

I/O

Flash IO

E2

FARDY_PAD

I

Flash ready/busy output

F2

FCEB_PAD[0]

O

Flash chip enable

G2

FCEB_PAD[3]

O

Flash chip enable

H2

FAWRB_PAD

O

Flash write enable

J2

MODE_PAD

I

VDD

K2

DAT4_PAD

I/O

Data

L2

DAT5_PAD

I/O

Data

M2

VDD(3.3V)

I

Power

N2

DAT6_PAD

I/O

Data

FLASH

VCC

V18F_PAD

VCC_HOST

DV_CARD_PAD

VDD(3.3V)

VCCAH

VCC3IO

V18F_PAD

V18_PAD

VCCK(1.8V)

VCCA

PS4043

GND

GNDA

*VCC_HOST：HOST supply voltage